ST10F272M-4TR3 STMicroelectronics, ST10F272M-4TR3 Datasheet - Page 69

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ST10F272M-4TR3

Manufacturer Part Number
ST10F272M-4TR3
Description
MCU 16BIT 256K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272M-4TR3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number:
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0
ST10F272M
15.3
In synchronous mode, data is transmitted or received synchronously to a shift clock which is generated
by the ST10F272M. Half-duplex communication up to 5 Mbaud (at 40 MHz of f
mode.
Table 38.
Note:
15.4
The high-speed synchronous serial interfaces (SSC0 and SSC1) provides flexible high-speed serial
communication between the ST10F272M and other microcontrollers, microprocessors or external
peripherals.
The SSCx supports full-duplex and half-duplex synchronous communication. The serial clock signal can
be generated by the SSCx itself (master mode) or be received from an external master (slave mode).
Data width, shift direction, clock polarity and phase are programmable.
This allows communication with SPI-compatible devices. Transmission and reception of data is double-
buffered. A 16-bit baudrate generator provides the SSCx with a separate serial clock signal. The serial
channel SSCx has its own dedicated 16-bit baudrate generator with 16-bit reload capability, allowing
baudrate generation independent from the timers.
Table 39
the 40 MHz CPU clock. The maximum is limited to 8 Mbaud.
Baudrate (baud) Deviation error Reload value (hex) Baudrate (baud) Deviation error Reload value (hex)
5 000 000
112 000
56 000
38 400
19 200
9 600
4 800
2 400
1 200
900
612
lists some possible baudrates against the required reload values and the resulting bit times for
ASCx in synchronous mode
ASC synchronous baudrates by reload value and deviation errors (f
The deviation errors given in the
baudrate crystal (providing a multiple of the ASC0 sampling frequency).
High speed synchronous serial interfaces
S0BRS = ‘0’, f
+1.5%/-0.8%
+0.3%/-0.8%
+0.2%/-0.6%
+0.2%/-0.2%
+0.2%/0.0%
+0.1%/0.0%
0.0%/0.0%
0.0%/0.0%
0.0%/0.0%
0.0%/0.0%
0.0%/0.0%
CPU
= 40 MHz
002B/002C
1FE8/1FE9
15B2/15B3
0000/0000
0058/0059
0081/0082
0103/0104
0207/0208
0410/0411
0822/0823
1045/1046
Table 38
are rounded off. To avoid deviation errors use a
3 333 333
112 000
56 000
38 400
19 200
9 600
4 800
2 400
1 200
600
407
S0BRS = ‘1’, f
+2.6%/-0.8%
+0.9%/-0.8%
+0.9%/-0.2%
+0.4%/-0.2%
+0.1%/-0.2%
+0.1%/-0.1%
+0.1%/0.0%
0.0%/0.0%
0.0%/0.0%
0.0%/0.0%
0.0%/0.0%
CPU
CPU
) is possible in this
= 40 MHz
CPU
Serial channels
00AC/00AD
0AD8/0AD9
1FFD/1FFE
001C/001D
056B/056C
003A/003B
015A/015B
02B5/02B6
15B2/15B3
= 40 MHz)
0000/0000
0055/0056
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