ST10F276-4T3 STMicroelectronics, ST10F276-4T3 Datasheet - Page 31

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ST10F276-4T3

Manufacturer Part Number
ST10F276-4T3
Description
MCU 16BIT 832K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
ST10F276-4T3
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Quantity:
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Part Number:
ST10F276-4T3
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0
ST10F276E
4.3.3
Flash control register 1 low
The Flash control register 1 low (FCR1L), together with Flash control register 1 high
(FCR1H), is used to select the sectors to erase, or during any write operation to monitor the
status of each sector of the module selected by SMOD bit of FCR0H. First diagram shows
FCR1L meaning when SMOD = 0; the second one when SMOD = 1.
FCR1L (0x0E 0004) SMOD = 0
FCR1L (0x0E 0004) SMOD = 1
Table 8.
SMOD = 0 (XFLASH selected)
SMOD = 1 (IFLASH selected)
15
15
B2F(2:0)
B0F(9:0)
Bit
14
14
Reserved
Flash control register 1 low
13
13
Bank 2 XFLASH sector 2:0 status
These bits must be set during a Sector Erase operation to select the sectors to erase
in Bank 2. Besides, during any erase operation, these bits are automatically set and
give the status of the three sectors of Bank 2 (B2F2-B2F0). The meaning of B2Fy bit
for sector y of Bank 2 is given by
end of a write operation if no errors are detected.
Bank 0 IFLASH sector 9:0 status
These bits must be set during a Sector Erase operation to select the sectors to erase
in Bank 0. Besides, during any erase operation, these bits are automatically set and
give the status of the 10 sectors of Bank 0 (B0F9-B0F0). The meaning of B0Fy bit for
sector y of Bank 0 is given by
a Write operation if no errors are detected.
12
12
11
11
10
10
Reserved
B0F9 B0F8 B0F7 B0F6 B0F5 B0F4 B0F3 B0F2 B0F1 B0F0
RS
9
9
Table
FCR
FCR
RS
8
8
Table
10. These bits are automatically reset at the end of
RS
7
7
Function
10. These bits are automatically reset at the
RS
6
6
RS
5
5
RS
4
4
Internal Flash memory
RS
3
3
Reset value: 0000h
Reset value: 0000h
B2F2 B2F1 B2F0
RS
RS
2
2
RS
RS
1
1
31/231
RS
RS
0
0

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