S9S08SG4E2MTJ Freescale Semiconductor, S9S08SG4E2MTJ Datasheet - Page 29
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S9S08SG4E2MTJ
Manufacturer Part Number
S9S08SG4E2MTJ
Description
MCU 4K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG4E2CSC.pdf
(316 pages)
Specifications of S9S08SG4E2MTJ
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Freescale Semiconductor
1
2
3
4
20-pin 16-pin
IIC pins can be repositioned using IICPS in SOPT2, default reset locations are on PTA2 and PTA3.
TPM1CHx pins can be repositioned using TPM1PS in SOPT2, default reset locations are on PTA0 and
PTB5.
This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority
over all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the
configuration for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out. Ganged output not
available in 8-pin packages.
If ACMP and ADC are both enabled, both will have access to the pin.
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Pin Number
—
—
—
—
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
8-pin
—
—
—
—
—
—
—
—
—
—
—
—
1
2
3
4
5
6
7
8
Table 2-1. Pin Availability by Package Pin-Count
PTB7
PTB6
PTB5
PTB4
PTC3
PTC2
PTC1
PTC0
PTB3
PTB2
PTB1
PTB0
PTA3
PTA2
PTA1
PTA0
MC9S08SG8 MCU Series Data Sheet, Rev. 6
Port Pin
Lowest
SCL
SDA
TPM1CH1
TPM2CH1
PIB3
PIB2
PIB1
PIB0
PIA3
PIA2
PIA1
PIA0
Alt 1
1
1
2
EXTAL
XTAL
SS
MISO
TPM1CH1
TPM1CH0
MOSI
SPSCK
TxD
RxD
SCL
SDA
TPM2CH0
TPM1CH0
Alt 2
1
1
Priority
2
2
2
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
Alt 3
3
3
3
3
3
3
3
3
BKGD
ADP11
ADP10
ADP9
ADP8
ADP7
ADP6
ADP5
ADP4
ADP3
ADP2
ADP1
ADP0
Chapter 2 Pins and Connections
Alt 4
Highest
4
4
MS
V
V
ACMPO
ACMP–
ACMP+
DD
SS
RESET
Alt5
4
4
28
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