MCHC908QT4VDWER Freescale Semiconductor, MCHC908QT4VDWER Datasheet - Page 50
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MCHC908QT4VDWER
Manufacturer Part Number
MCHC908QT4VDWER
Description
IC MCU 4K FLASH W/ADC 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QT4VDWER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
5
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
HC08QT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Auto Wakeup Module (AWU)
The auto wakeup RC oscillator is highly dependent on operating voltage and temperature. This feature is
not recommended for use as a time-keeping function.
The wakeup request is latched to allow the interrupt source identification. The latched value, AWUL, can
be read directly from the bit 6 position of PTA data register. This is a read-only bit which is occupying an
empty bit position on PTA. No PTA associated registers, such as PTA6 data, PTA6 direction, and PTA6
pullup exist for this bit. The latch can be cleared by writing to the ACKK bit in the KBSCR register. Reset
also clears the latch. AWUIE bit in KBI interrupt enable register (see
reading.
The AWU oscillator and counters are inactive in normal operating mode and become active only upon
entering stop mode.
4.4 Wait Mode
The AWU module remains inactive in wait mode.
4.5 Stop Mode
When the AWU module is enabled (AWUIE = 1 in the keyboard interrupt enable register) it is activated
automatically upon entering stop mode. Clearing the IMASKK bit in the keyboard status and control
register enables keyboard interrupt requests to bring the MCU out of stop mode. The AWU counters start
from ‘0’ each time stop mode is entered.
50
(CGMXCLK)
BUSCLKX4
RESET
CLK
CLRLOGIC
COPRS (FROM CONFIG1)
RST
Figure 4-1. Auto Wakeup Interrupt Request Generation Logic
CLEAR
EN
INT RC OSC
32 kHz
RESET
MC68HC908QY/QT Family Data Sheet, Rev. 6
AWUIE
SHORT
CLK
AUTOWUGEN
ISTOP
OVERFLOW
RST
1 = DIV 2
0 = DIV 2
9
14
RESET
ACKK
V
DD
Figure
D
E
R
Q
4-1) has no effect on AWUL
TO KBI INTERRUPT LOGIC (SEE
Figure 9-2. Keyboard Interrupt
Block
Freescale Semiconductor
Diagram)
TO PTA READ, BIT 6
AWUIREQ
AWUL
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