MC9S08SV16CLC Freescale Semiconductor, MC9S08SV16CLC Datasheet

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MC9S08SV16CLC

Manufacturer Part Number
MC9S08SV16CLC
Description
MCU 8BIT 16K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SV16CLC

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
S08SV
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
30
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SV16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Freescale Semiconductor
Data Sheet: Technical Data
MC9S08SV16 Series
Covers: MC9S08SV16 and
MC9S08SV8
Features:
• 8-Bit HCS08 Central Processor Unit (CPU)
• On-Chip Memory
• Power-Saving Modes
• Clock Source Options
• System Protection
• Development Support
© Freescale Semiconductor, Inc., 2009. All rights reserved.
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
– Up to 40 MHz CPU at 2.7 V to 5.5 V across temperature
– HC08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
– Up to 16 KB flash read/program/erase over full
– Up to 1024-byte random-access memory (RAM)
– Security circuitry to prevent unauthorized access to
– Two low power stop modes; reduced power wait mode
– Allows clocks to remain enabled to specific peripherals
– Oscillator (XOSC) — Loop-control Pierce oscillator;
– Internal Clock Source (ICS) — Internal clock source
– Watchdog computer operating properly (COP) reset
– Low-voltage detection with reset or interrupt; selectable
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash block protection
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
range of –40 °C to 85 °C
operating voltage and temperature
RAM and flash contents
in stop3 mode
crystal or ceramic resonator range of 31.25 kHz to
39.0625 kHz or 1 MHz to 16 MHz
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supporting bus frequencies up to 20 MHz
with option to run from dedicated 1 kHz internal clock
source or bus clock
trip points
during in-circuit debugging (plus two more breakpoints)
• Peripherals
• Input/Output
• Package Options
– On-chip in-circuit emulator (ICE) debug module
– IPC — Interrupt priority controller to provide hardware
– ADC — 12-channel, 10-bit resolution; 2.5 μs
– TPM — One 6-channel and one 2-channel
– MTIM16 — One 16-bit modulo timer
– SCI — One serial communications interface module
– SPI — One serial peripheral interface module in 8-bit
– IIC — Inter-integrated circuit bus module capable of
– ACMP — Analog comparator with option to compare to
– RTC — Real time counter
– KBI— 8-pin keyboard interrupt module with software
– 30 GPIOs including one output-only pin and one
– 32-pin SDIP
– 32-pin LQFP
containing two comparators and nine trigger modes
based nested interrupt mechanism
conversion time; automatic compare function;
1.7 mV/°C temperature sensor; internal bandgap
reference channel; operation in stop; optional hardware
trigger; fully functional from 2.7 V to 5.5 V
timer/pulse-width modulators (TPM) modules;
selectable input capture, output compare, or buffered
edge- or center-aligned PWM on each channel
with optional 13-bit break; LIN extensions
data length mode with a receiving data buffer hardware
match function
operation up to 100 kbps with maximum bus loading;
multi-master operation; programmable slave address;
interrupt-driven byte-by-byte data transfer; broadcast
mode; 10-bit addressing
internal reference
selectable polarity on edge or edge/level modes
input-only pin
32-Pin LQFP
873A-03
MC9S08SV16
Document Number: MC9S08SV16
Document Number: MC9S08SV16
Rev. 2, 7/2009
Rev. 2, 7/2009
32-Pin SDIP
1376-02

Related parts for MC9S08SV16CLC

MC9S08SV16CLC Summary of contents

Page 1

... Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints) This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2009. All rights reserved. Document Number: MC9S08SV16 Document Number: MC9S08SV16 MC9S08SV16 ...

Page 2

... Flash Specifications . . . . . . . . . . . . . . . . . . . . . . 30 5.13 EMC Performance . . . . . . . . . . . . . . . . . . . . . . . 31 5.13.1Radiated Emissions . . . . . . . . . . . . . . . . . 31 6 Ordering Information Package Information 7.1 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . 33 Description of Changes Initial public release. Updated Section 5.13, “EMC Performance.” Corrected Table 1. Corrected default trim value to 31.25 kHz. MC9S08SV16 Series Data Sheet, Rev. 2 Freescale Semiconductor ...

Page 3

... V REFL V DDA V SSA NOTE 1. PTA4 is output only when used as port pin. 2. PTA5 is input only when used as port pin. Figure 1. MC9S08SV16 Series Block Diagram Freescale Semiconductor 16-BIT MODULO TIMER (MTIM16) 8-PIN KEYBOARD (KBI) INTERRUPT 2-CH TIMER/PWM MODULE (TPM2) RESET IRQ INTERRUPT PRIORITY ...

Page 4

... ICSFFCLK ICS ICSOUT ICSLCLK XOSC CPU EXTAL XTAL Figure 2. System Clock Distribution Diagram 4 RTC COP TPM2 FIXED CLOCK (XCLK) ÷ 2 ÷ 2 SCI BDC FLASH MC9S08SV16 Series Data Sheet, Rev. 2 TCLK TPM1 MTIM16 ADC BUS CLOCK RAM SPI IIC IPC Freescale Semiconductor ...

Page 5

... Pin Assignments This section shows the pin assignments for the MC9S08SV16 series devices. PTC5/SPSCK PTC4/SS PTA5/IRQ/TCLK/RESET PTD2/TPM1CH2 PTA4/ACMPO/BKGD/MS PTD0/SCL PTD1/SDA PTB7/EXTAL PTB6/XTAL PTB5/TPM1CH1 PTD3/TPM1CH3 PTB4/TPM1CH0 PTC3/ADP11/ACMP– PTC2/ADP10/ACMP+ Figure 3. MC9S08SV16 Series 32-Pin SDIP Package Freescale Semiconductor MC9S08SV16 Series Data Sheet, Rev. 2 ...

Page 6

... PTB6 I/O XTAL O PTB5 I/O PTD3 I/O PTB4 I/O MC9S08SV16 Series Data Sheet, Rev PTA1/KBIP1/ADP1 23 PTA2/KBIP2/ADP2 22 PTA3/KBIP3/ADP3 21 PTA6/TPM2CH0 20 PTA7/TPM2CH1 19 PTB0/KBP4/RxD/ADP4 PTB1/KBIP5/TxD/ADP5 18 PTB2/KBIP6/ADP6 17 --> Highest Alt 2 I/O Alt 3 I/O TCLK I RESET I TPM1CH2 I/O BKGD TPM1CH1 I/O TPM1CH3 I/O TPM1CH0 I/O Freescale Semiconductor ...

Page 7

... The highest priority module will have control over the pin. Selecting a higher priority pin function with a lower priority function already enabled can cause spurious edges to the lower priority module. Disable all modules that share a pin before enabling another module. Freescale Semiconductor <-- Lowest Priority Port Pin ...

Page 8

... MC9S08SV8 8 $0000 $003F $0040 $043F $0440 $17FF $1800 $187F $1880 $BFFF $C000 $FFFF Figure 5. MC9S08SV16 Series Memory Map MC9S08SV16 Series Data Sheet, Rev. 2 DIRECT PAGE REGISTERS RAM 1024 BYTES UNIMPLEMENTED HIGH PAGE REGISTERS UNIMPLEMENTED FLASH 16384 BYTES MC9S08SV16 Freescale Semiconductor ...

Page 9

... Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either V pullup resistor associated with the pin is enabled. Freescale Semiconductor Table 2. Parameter Classifications NOTE Table 3 may affect device reliability or cause permanent MC9S08SV16 Series Data Sheet, Rev ...

Page 10

... J × θ MC9S08SV16 Series Data Sheet, Rev. 2 Value Unit –0.3 to 5.8 V 120 mA –0 0 ±25 mA °C –55 to 150 ) and negative (V ) clamp DD SS and range during instantaneous and > greater than will be very small Value Unit ° – °C °C/W 56 Freescale Semiconductor Eqn. 1 ...

Page 11

... Model Series resistance Human Storage capacitance body Number of pulses per pin Minimum input voltage limit Latch-up Maximum input voltage limit Freescale Semiconductor and can be neglected. An approximate relationship between P int = K ÷ 273° for K gives: × 273°C) + θ ...

Page 12

... V — — DD 0.85 × V — — DD 0.35 × V — — DD 0.30 × V — — DD 0.06 × V — — DD — 0 — 0 Freescale Semiconductor Unit μA μA ...

Page 13

... The specified resistor value is the actual value internal to the device. The pullup or pulldown value may appear higher when measured externally on the pin. 3 All functional non-supply pins, except for PTA5 are internally clamped to V Freescale Semiconductor Table 7. DC Characteristics (continued) Symbol Condition ...

Page 14

... DD > greater than I , the injection current may flow out vs (High Drive 0.3 0.5 0 Vs. V – 5.0 V) (High Drive MC9S08SV16 Series Data Sheet, Rev load will shunt current greater than maximum DD -40C 0C 25C 55C 85C 1.3 2 Freescale Semiconductor and could ...

Page 15

... Figure 7. Typical I 50.000 45.000 40.000 35.000 30.000 25.000 20.000 15.000 10.000 5.000 0.000 0 Figure 8. Typical I Freescale Semiconductor vs (Low Drive 0.3 0.5 0 Vs. V – 5.0 V) (Low Drive Typical I vs (High Drive) ...

Page 16

... Figure 10. Typical I 16 Typical I vs (Low Drive 0.3 0 5.0 V) (Low Drive vs (High Drive 0.3 0.5 0.8 0.9 V Vs. V – 3.0 V) (High Drive MC9S08SV16 Series Data Sheet, Rev. 2 -40C 0C 25C 55C 85C 1.3 2 -40C 0C 25C 55C 85C 1.2 1.5 Freescale Semiconductor ...

Page 17

... Typical I 4.000 3.500 3.000 2.500 2.000 1.500 1.000 0.500 0.000 0 Figure 11. Typical I 24.000 22.000 20.000 18.000 16.000 14.000 12.000 10.000 8.000 6.000 4.000 2.000 0.000 0 Figure 12. Typical I Freescale Semiconductor vs (Low Drive 0.3 0.5 0.8 0.9 V Vs. V – Typical I vs (High Drive ...

Page 18

... Freescale Semiconductor Temp ...

Page 19

... Stop3 mode supply current 8 no clocks active ADC adder to stop3 C 10 RTC adder to stop3 and stop2 LVD adder to stop3 and stop2 C 1 Data in Typical column was characterized at 5 ° typical recommended value. Freescale Semiconductor Bus V (V) Symbol DD Freq 20 MHz MHz — 5 S2I DD — ...

Page 20

... SV16 Run Current VS. Bus Frequency 7.0000 6.0000 5.0000 4.0000 3.0000 2.0000 1.0000 0.0000 1 Figure 14. Typical Run Bus Frequency (MHz) for FBE (All Modules Off) DD MC9S08SV16 Series Data Sheet, Rev. 2 FBE 3V -40C FBE 3V 25C FBE 3V 85C FBE 5V -40C FBE 5V 25C FBE 5V 85C 20 Freescale Semiconductor ...

Page 21

... Over fixed voltage and temperature range °C 4 FLL acquisition time Long term jitter of DCO output clock (averaged over interval) Data in Typical column was characterized at 5 ° typical recommended value. 1 Freescale Semiconductor Symbol Low range (DRS = 00) f Middle range (DRS = 10) 4 Δf t ...

Page 22

... Figure 16. Deviation of DCO Output from Trimmed Frequency (20 MHz, 5 and V and variation in crystal oscillator frequency increase the C SS XOSC EXTAL R F Crystal or Resonator C 1 1.00% 0.50% 0.00% - -0.50% TBD -1.00% -1.50% -2.00% Temperature MC9S08SV16 Series Data Sheet, Rev. 2 Bus percentage for a Jitter XTAL 100 120 Freescale Semiconductor . ...

Page 23

... This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized. 5 Timing is shown with respect to 20% V RESET PIN Freescale Semiconductor Table 10. Control Timing Rating Symbol ) ...

Page 24

... TCLK t TCLK t clkh t clkl t ICPW t TCLK t clkh Figure 19. Timer External Clock t ICPW t ICPW Figure 20. Timer Input Capture Pulse MC9S08SV16 Series Data Sheet, Rev. 2 Min Max Unit Bus 4 — t cyc 1.5 — t cyc 1.5 — t cyc 1.5 — t cyc t clkl Freescale Semiconductor ...

Page 25

... Data valid (after SPSCK edge Master Slave Data hold time (outputs Master Slave Rise time 11 D Input Output Fall time 12 D Input Output Freescale Semiconductor Figure 24 describe the timing requirements for the SPI system. Table 12. SPI Timing Symbol SPSCK t Lead t Lag t WSPSCK ...

Page 26

... SS output mode (DDS7 = 1, SSOE = 1). 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB BIT BIT Figure 21. SPI Master Timing (CPHA = (2) BIT (2) BIT Figure 22. SPI Master Timing (CPHA =1) MC9S08SV16 Series Data Sheet, Rev LSB IN 10 LSB OUT LSB IN MASTER LSB OUT PORT DATA Freescale Semiconductor ...

Page 27

... MOSI MSB IN (INPUT) NOTE: 1. Not defined but normally LSB of character just received 5.10 Analog Comparator (ACMP) Electricals Table 13. Analog Comparator Electrical Specifications C Characteristic D Supply voltage P Supply current (active) Freescale Semiconductor BIT BIT Figure 23. SPI Slave Timing (CPHA = BIT MSB OUT 6 BIT 6 ...

Page 28

... Max – 0.3 — — 9.0 15.0 — — 1.0 — — 1.0 1 Typ Max Unit Comment — 5.5 V — REFH 4.5 5 kΩ — 5 kΩ External to MCU — 10 — 10 — 8.0 MHz — 4.0 Freescale Semiconductor Unit μA μs ...

Page 29

... Supply current ADLPC = 0 T ADLSMP = 1 ADCO = 1 Supply current ADLPC = 0 P ADLSMP = 0 ADCO = 1 ADC High speed (ADLPC = 0) P asynchronous Low power (ADLPC = 1) clock source Freescale Semiconductor SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT Pad AS leakage due to input protection + V ADIN – INPUT PIN INPUT PIN ...

Page 30

... LSB ±0.3 ±0.5 ±0.5 ±1.0 2 LSB ±0.3 ±0.5 ±1.5 ±2.1 2 LSB V ADIN ±0.5 ±0.7 ±1 ±1.5 2 LSB V ADIN ±0.5 ±0.5 ±0.5 — 2 LSB ±0.5 — ±0.2 ±2.5 Pad leakage 2 LSB ±0.1 ±1 DD Freescale Semiconductor = V SSA = V DDA supply. ...

Page 31

... IEC 61967-2 and SAE J1752/3 standards. The measurement is performed with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test software. The radiated emissions from the microcontroller are measured in a TEM cell in two package orientations (the North and East). Freescale Semiconductor Table 16. Flash Characteristics Symbol Min V 2 ...

Page 32

... XX MC Package designator (see Temperature range MC9S08SV16 Series Data Sheet, Rev Level f /f OSC BUS (Max) 4 MHz crystal 9 19 MHz bus Available Packages 32-pin SDIP 32-pin LQFP Table 19 –40 ° °C) Approximate flash size in KB Freescale Semiconductor Unit dBμV — — ...

Page 33

... Pin Count Package Type 32 Low Quad Flat Package 32 Shrink Dual In-line Package 7.1 Mechanical Drawings The following pages are mechanical drawings for the packages described in Freescale Semiconductor Table 19. Package Descriptions Abbreviation Designator LQFP LC SDIP BM MC9S08SV16 Series Data Sheet, Rev. 2 Package Information Case No ...

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... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc ...

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