PC9RS08LA8CFT Freescale Semiconductor, PC9RS08LA8CFT Datasheet - Page 9

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PC9RS08LA8CFT

Manufacturer Part Number
PC9RS08LA8CFT
Description
MCU 8BIT 8K FLASH W/ LCD 48-QFN
Manufacturer
Freescale Semiconductor
Series
RS08r
Datasheet

Specifications of PC9RS08LA8CFT

Core Processor
RS08
Core Size
8-Bit
Speed
20MHz
Connectivity
SCI, SPI
Peripherals
LCD, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PC9RS08LA8CFT
Manufacturer:
FRE/MOT
Quantity:
20 000
(if PI/O is neglected) is:
Solving
where K is a constant pertaining to the particular part. K can be determined from
measuring P
obtained by solving equations 1 and 2 iteratively for any value of T
3.4
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Freescale Semiconductor
Equation 1
ESD Protection and Latch-Up Immunity
D
Latch-up
Machine
Model
Human
(at equilibrium) for a known T
Body
and
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Equation 2
Table 5. ESD and Latch-up Test Conditions
Description
MC9RS08LA8 Series MCU Data Sheet, Rev. 1
K = P
for K gives:
D
P
× (T
D
= K ÷ (T
A
A
+ 273°C) + θ
. Using this value of K, the values of P
J
+ 273°C)
Symbol
JA
R1
R1
C
C
× (PD)
2
A
.
Value
1500
–2.5
100
200
7.5
3
0
3
Equation A-3
Electrical Characteristics
D
and T
Unit
pF
pF
Ω
Ω
V
V
J
can be
by
Eqn. 2
Eqn. 3
9

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