C8051F301-GMR Silicon Laboratories Inc, C8051F301-GMR Datasheet - Page 105

IC 8051 MCU 8K FLASH 11QFN

C8051F301-GMR

Manufacturer Part Number
C8051F301-GMR
Description
IC 8051 MCU 8K FLASH 11QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F30xr
Datasheets

Specifications of C8051F301-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
8
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
11-VQFN
Package
11QFN EP
Device Core
8051
Family Name
C8051F30x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
8
Interface Type
I2C/SMBus/UART
Number Of Timers
3
For Use With
336-1444 - ADAPTER PROGRAM TOOLSTICK F300336-1319 - REFERENCE DESIGN STEPPER MOTOR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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Registers XBR1 and XBR2 are used to assign the digital I/O resources to the physical I/O Port pins. Note
that when the SMBus is selected, the Crossbar assigns both pins associated with the SMBus (SDA and
SCL). Either or both of the UART signals may be selected by the Crossbar. UART0 pin assignments are
fixed for bootloading purposes: when UART TX0 is selected, it is always assigned to P0.4; when UART
RX0 is selected, it is always assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized
functions have been assigned. For example, if assigned functions that take the first 3 Port I/O (P0.[2:0]), 5
Port I/O are left for analog or GPIO use.
SF Signals
PIN I/O
TX0
RX0
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
Figure 12.4. Crossbar Priority Decoder with XBR0 = 0x44
VREF
0
0
Port pin potentially available to peripheral
Port pin skipped by CrossBar
Special Function Signals are not assigned by the crossbar. When
these signals are enabled, the CrossBar must be manually
configured to skip their corresponding port pins. Note: x1 refers to
the XTAL1 signal; x2 refers to the XTAL2 signal.
1
0
x1
2
1
XBR0[0:7]
x2
3
0
P0
4
0
Rev. 2.9
5
0
CNVSTR
6
1
7
0
C8051F300/1/2/3/4/5
105

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