MCHC908QY1VDWE Freescale Semiconductor, MCHC908QY1VDWE Datasheet - Page 70
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MCHC908QY1VDWE
Manufacturer Part Number
MCHC908QY1VDWE
Description
IC MCU 1.5K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QY1VDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Package
16SOIC W
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Central Processor Unit (CPU)
70
PULA
PULH
PULX
ROL opr
ROLA
ROLX
ROL opr,X
ROL ,X
ROL opr,SP
ROR opr
RORA
RORX
ROR opr,X
ROR ,X
ROR opr,SP
RSP
RTI
RTS
SBC #opr
SBC opr
SBC opr
SBC opr,X
SBC opr,X
SBC ,X
SBC opr,SP
SBC opr,SP
SEC
SEI
STA opr
STA opr
STA opr,X
STA opr,X
STA ,X
STA opr,SP
STA opr,SP
STHX opr
STOP
STX opr
STX opr
STX opr,X
STX opr,X
STX ,X
STX opr,SP
STX opr,SP
SUB #opr
SUB opr
SUB opr
SUB opr,X
SUB opr,X
SUB ,X
SUB opr,SP
SUB opr,SP
Source
Form
Pull A from Stack
Pull H from Stack
Pull X from Stack
Rotate Left through Carry
Rotate Right through Carry
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Subtract with Carry
Set Carry Bit
Set Interrupt Mask
Store A in M
Store H:X in M
Enable Interrupts, Stop Processing,
Refer to MCU Documentation
Store X in M
Subtract
Operation
Table 7-1. Instruction Set Summary (Sheet 5 of 6)
MC68HC908QY/QT Family Data Sheet, Rev. 6
SP ← (SP) + 1; Pull (CCR)
SP ← (SP) + 1; Pull (PCH)
SP ← (SP) + 1; Pull (PCL)
SP ← SP + 1; Pull (PCH)
SP ← SP + 1; Pull (PCL)
SP ← (SP + 1); Pull (A)
SP ← (SP + 1); Pull (H)
SP ← (SP + 1); Pull (X)
SP ← (SP) + 1; Pull (A)
SP ← (SP) + 1; Pull (X)
I ← 0; Stop Processing
C
b7
A ← (A) – (M) – (C)
(M:M + 1) ← (H:X)
Description
A ← (A) – (M)
b7
SP ← $FF
M ← (A)
M ← (X)
C ← 1
I ← 1
b0
b0
C
V H I N Z C
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – – INH
– – – – – 1 INH
– – 1 – – – INH
0 – –
0 – –
– – 0 – – – INH
0 – –
– –
– –
– –
– –
on CCR
Effect
–
– DIR
–
Freescale Semiconductor
DIR
INH
INH
IX1
IX
SP1
DIR
INH
INH
IX1
IX
SP1
INH
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
EXT
IX2
IX1
IX
SP1
SP2
DIR
EXT
IX2
IX1
IX
SP1
SP2
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
9EE2
9ED2
9EE7
9ED7
9EEF
9EDF
9EE0
9ED0
9E69
9E66
9C
C2
D2
C7
D7
BF
CF
DF
EF
C0
D0
86
8A
88
39
49
59
69
79
36
46
56
66
76
80
81
A2
B2
E2
F2
99
9B
B7
E7
F7
35
8E
FF
A0
B0
E0
F0
dd
ff
ff
dd
ff
ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
dd
hh ll
ee ff
ff
ff
ee ff
dd
dd
hh ll
ee ff
ff
ff
ee ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
2
2
4
1
1
4
3
5
4
1
1
4
3
5
1
7
4
2
3
4
4
3
2
4
5
1
2
3
4
4
3
2
4
5
4
1
3
4
4
3
2
4
5
2
3
4
4
3
2
4
5
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