C8051F331-GMR Silicon Laboratories Inc, C8051F331-GMR Datasheet - Page 207

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C8051F331-GMR

Manufacturer Part Number
C8051F331-GMR
Description
IC 8051 MCU 8K FLASH 20QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheets

Specifications of C8051F331-GMR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
For Use With
336-1451 - ADAPTER PROGRAM TOOLSTICK F330336-1264 - DEV KIT FOR C8051F330/F331
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F331-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F331-GMR
0
20.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming may be performed. This is possible because C2 communication is typically performed
when the device is in the halt state, where all on-chip peripherals and user software are stalled. In this
halted state, the C2 interface can safely ‘borrow’ the C2CK (RST) and C2D (P2.0) pins. In most applica-
tions, external resistors are required to isolate C2 interface traffic from the user application. A typical isola-
tion configuration is shown in Figure 20.1.
The configuration in Figure 20.1 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 20.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.7
C8051F330/1/2/3/4/5
C2CK
C2D
C8051Fxxx
211

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