MC9S08GT32ACFDER Freescale Semiconductor, MC9S08GT32ACFDER Datasheet - Page 169

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MC9S08GT32ACFDER

Manufacturer Part Number
MC9S08GT32ACFDER
Description
MCU 8BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT32ACFDER

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08GT
Core
HCS08
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
If the associated port pin is not stable for at least two bus clock cycles before changing to input capture
mode, it is possible to get an unexpected indication of an edge trigger. Typically, a program would clear
status flags after changing channel configuration bits and before enabling channel interrupts or using the
status flags to avoid any unexpected behavior.
10.7.5
These read/write registers contain the captured TPM counter value of the input capture function or the
output compare value for the output compare or PWM functions. The channel value registers are cleared
by reset.
Freescale Semiconductor
CPWMS
Reset
Reset
X
0
1
W
W
R
R
Bit 15
Timer x Channel Value Registers (TPMxCnVH:TPMxCnVL)
Bit 7
MSnB:MSnA
0
0
7
7
XX
XX
1X
00
01
Figure 10-11. Timer x Channel Value Register High (TPMxCnVH)
Figure 10-12. Timer Channel Value Register Low (TPMxCnVL)
14
0
6
0
6
6
ELSnB:ELSnA
Table 10-5. Mode, Edge, and Level Selection
X1
X1
00
01
10
11
00
01
10
11
10
10
13
MC9S08GB60A Data Sheet, Rev. 2
0
5
0
5
5
Pin not used for TPM channel; use as an external clock for the TPM or
revert to general-purpose I/O
Output compare
Center-aligned
Input capture
Edge-aligned
Mode
PWM
PWM
12
0
4
0
4
4
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
High-true pulses (clear output on compare)
Low-true pulses (set output on compare)
High-true pulses (clear output on compare-up)
Low-true pulses (set output on compare-up)
11
3
0
3
3
0
10
0
2
0
2
2
Configuration
9
0
1
0
1
1
Timer/PWM (TPM)
Bit 8
Bit 0
0
0
0
0
169

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