MC908LJ12CPBER Freescale Semiconductor, MC908LJ12CPBER Datasheet - Page 371
MC908LJ12CPBER
Manufacturer Part Number
MC908LJ12CPBER
Description
IC MCU 12K FLASH 4/8MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC98LJ12CFUE.pdf
(414 pages)
Specifications of MC908LJ12CPBER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908LJ12CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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20.1 Contents
20.2 Introduction
MC68HC908LJ12
Freescale Semiconductor
Technical Data — MC68HC908LJ12
Section 20. Computer Operating Properly (COP)
—
Rev. 2.1
20.2
20.3
20.4
20.4.1
20.4.2
20.4.3
20.4.4
20.4.5
20.4.6
20.4.7
20.4.8
20.5
20.6
20.7
20.8
20.8.1
20.8.2
20.9
The computer operating properly (COP) module contains a free-running
counter that generates a reset if allowed to overflow. The COP module
helps software recover from runaway code. Prevent a COP reset by
clearing the COP counter periodically. The COP module can be disabled
through the COPD bit in the configuration register 1 (CONFIG1).
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 371
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .375
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .372
I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373
COP Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375
Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .375
COP Module During Break Mode . . . . . . . . . . . . . . . . . . . . . . 376
Computer Operating Properly (COP)
ICLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373
STOP Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373
COPCTL Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .373
Power-On Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373
Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374
Reset Vector Fetch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374
COPD (COP Disable). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374
COPRS (COP Rate Select) . . . . . . . . . . . . . . . . . . . . . . . . 374
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .376
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .376
Technical Data
371
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