MC908AP32CFBER Freescale Semiconductor, MC908AP32CFBER Datasheet - Page 248

• Manufacturer Part Number: MC908AP32CFBER
• Description: IC MCU 32K FLASH 8MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32CFBER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Multi-Master IIC Interface (MMIIC)
14.9 SMBus Protocol Implementation
246
MASTER MODE
START
SLAVE MODE
START
OPERATION:
Prepare for Master mode
ACTION:
1. Load slave address to MMADR
2. Clear MMRW
3. Load command to MMDTR
4. Set MMAST
OPERATION:
Prepare for Slave mode
ACTION:
1. Load slave address to MMADR
2. Clear MMTXAK
3. Clear MMAST
Shaded data packets indicate transmissions by the MCU
Address
Address
OPERATION:
Slave address match and
FLAGS:
MMRXIF set
MMATCH set
MMSRW depends on 8th
ACTION:
1. Check MMSRW
2. Read Slave address
check for data direction
bit of calling address byte
OPERATION:
Prepare for repeated START
FLAGS:
MMTXIF set
MMRXAK clear
ACTION:
1. Set MMRW
2. Set REPSEN
3. Clear MMTXAK
4. Load dummy ($FF) to MMDTR
0
0
ACK
ACK
Command
Command
OPERATION:
Read and decode received command
FLAGS:
MMRXIF set
MMATCH clear
ACTION:
Load Data1 to MMDTR
Figure 14-20. SMBus Protocol Implementation
ACK
ACK
MC68HC908AP Family Data Sheet, Rev. 4
OPERATION:
Slave address match and
FLAGS:
MMRXIF set
MMATCH set
MMSRW depends on 8th
ACTION:
Check MMSRW
get ready to transmit data
bit of calling address byte
START
START
OPERATION:
Get ready to receive data
FLAGS:
MMTXIF set
MMRXAK clear
ACTION:
Load dummy ($FF) to MMDTR
Address
Address
1
1
ACK
ACK
OPERATION:
Transmit data
FLAGS:
MMTXIF set
ACTION:
Load Data2 to MMDTR
RX Data1
TX Data1
OPERATION:
Read received data
FLAGS:
MMRXIF set
ACTION:
Read Data1 from MMDRR
OPERATION:
Transmit data
FLAGS:
MMTXIF set
MMRXAK clear
ACTION:
Load Data3 to MMDTR
OPERATION:
Read received data and prepare for STOP
FLAGS:
MMRXIF set
ACTION:
1. Set MMTXAK
2. Read Data(N-1) from MMDRR
3. Clear MMAST
ACK
ACK
OPERATION:
Last data is going to be sent
FLAGS:
MMTXIF set
MMRXAK clear
ACTION:
Load dummy ($FF) to MMDTR
ACK
ACK
Freescale Semiconductor
OPERATION:
Last data sent
FLAGS:
MMTXIF set
MMRXAK set
ACTION:
Load dummy ($FF) to MMDTR
RX DataN
TX DataN
OPERATION:
Generate STOP
FLAGS:
MMRXIF set
ACTION:
Read DataN from MMDRR
NAK
NAK
STOP
STOP