MC908GZ60VFAE Freescale Semiconductor, MC908GZ60VFAE Datasheet - Page 179
![IC MCU 60K FLASH 8MHZ 48-LQFP](/photos/19/7/190723/4134800_sml.jpg)
MC908GZ60VFAE
Manufacturer Part Number
MC908GZ60VFAE
Description
IC MCU 60K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ60VFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GZ60VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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DDRC6–DDRC0 — Data Direction Register C Bits
Figure 13-11
When bit DDRCx is a 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a 0,
reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
PTCPUE
These read/write bits control port C data direction. Reset clears DDRC6–DDRC0, configuring all port
C pins as inputs.
Bit
1
0
X
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
shows the port C I/O logic.
DDRC
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Bit
0
0
1
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
DD
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
by internal pullup device.
PTC
X
Bit
X
X
(1)
Input, Hi-Z
Input, V
Table 13-4. Port C Pin Functions
I/O Pin
Output
RESET
Mode
Figure 13-11. Port C I/O Circuit
DD
(2)
(4)
Table 13-4
NOTE
Accesses to DDRC
DDRCx
PTCx
DDRC6–DDRC0
DDRC6–DDRC0
DDRC6–DDRC0
Read/Write
summarizes the operation of the port C pins.
PTCPUEx
PTC6–PTC0
Read
Pin
Pin
Accesses to PTC
V
DD
INTERNAL
PULLUP
DEVICE
PTCx
PTC6–PTC0
PTC6–PTC0
PTC6–PTC0
Write
Port C
(3)
(3)
179
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