R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 150
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
12.5
Figure 12.19
Table 12.9
Timer RC
Clock synchronous serial
I/O with chip select
I
2
The timer RC interrupt, clock synchronous serial I/O with chip select interrupt, and I
have multiple interrupt request sources. An interrupt request is generated by the logical OR of several interrupt
request factors and is reflected in the IR bit in the corresponding interrupt control register. Therefore, each of these
peripheral functions has its own interrupt request source status register (status register) and interrupt request source
enable register (enable register) to control the generation of interrupt requests (change the IR bit in the interrupt
control register). Table 12.9 lists the Registers Associated with Timer RC Interrupt, Clock Synchronous Serial I/O
with Chip Select Interrupt, and I
Interrupt.
C bus interface
Timer RC Interrupt, Clock Synchronous Serial I/O with Chip Select
Interrupts, and I
Request Sources)
Sep 26, 2008
Chip Select Interrupt, and I
Registers Associated with Timer RC Interrupt, Clock Synchronous Serial I/O with
Block Diagram of Timer RC Interrupt
IMFA, IMFB, IMFC, IMFD, OVF: Bits in TRCSR register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRCIER register
Page 131 of 453
TRCSR
SSSR
ICSR
Interrupt Request Source
2
IMIEC bit
IMIED bit
IMIEA bit
IMIEB bit
C bus Interface Interrupt (Interrupts with Multiple Interrupt
IMFC bit
IMFD bit
IMFA bit
IMFB bit
OVIE bit
OVF bit
2
Status Register of
C bus Interface Interrupt and Figure 12.19 shows a Block Diagram of Timer RC
2
C bus Interface Interrupt
Interrupt Request Source
TRCIER
SSER
ICIER
Enable Register of
Timer RC
interrupt request
(IR bit in TRCIC register)
2
C bus interface interrupt each
TRCIC
SSUIC
IICIC
Interrupt Control
Register
12. Interrupts
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