C8051F045-GQR Silicon Laboratories Inc, C8051F045-GQR Datasheet - Page 31
C8051F045-GQR
Manufacturer Part Number
C8051F045-GQR
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F045-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F045-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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1.6.
The C8051F04x family of devices feature a Controller Area Network (CAN) controller that implements
serial communication using the CAN protocol. The CAN controller facilitates communication on a CAN net-
work in accordance with the Bosch specification 2.0A (basic CAN) and 2.0B (full CAN). The CAN controller
consists of a CAN Core, Message RAM (separate from the C8051 RAM), a message handler state
machine, and control registers.
The CAN controller can operate at bit rates up to 1 Mbit/second. Silicon Labs CAN has 32 message
objects each having its own identifier mask used for acceptance filtering of received messages. Incoming
data, message objects and identifier masks are stored in the CAN message RAM. All protocol functions for
transmission of data and acceptance filtering is performed by the CAN controller and not by the C8051
MCU. In this way, minimal CPU bandwidth is used for CAN communication. The C8051 configures the
CAN controller, accesses received data, and passes data for transmission via Special Function Registers
(SFR) in the C8051.
1.7.
The C8051F04x MCU Family includes two Enhanced Full-Duplex UARTs, an enhanced SPI Bus, and
SMBus/I
CIP-51's interrupts, thus requiring very little intervention by the CPU. The serial buses do not "share"
resources such as timers, interrupts, or Port I/O, so any or all of the serial buses may be used together with
any other.
Controller Area Network
Serial Ports
2
C. Each of the serial buses is fully implemented in hardware and makes extensive use of the
CANTX
TX
(32 Message Objects)
Figure 1.11. CAN Controller Diagram
Message RAM
Core
CAN
Message Handler
CANRX
RX
Rev. 1.5
CAN Controller
C8051F040/1/2/3/4/5/6/7
REGISTERS
Prescaler
BRP
Interrupt
CAN_CLK
(f
sys
)
C8051F04x
CIP-51
C
S
Y
S
L
K
S
R
's
F
MCU
31
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