C8051F044-GQR Silicon Laboratories Inc, C8051F044-GQR Datasheet - Page 250
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C8051F044-GQR
Manufacturer Part Number
C8051F044-GQR
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F044-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
C8051F044-GQR
Manufacturer:
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C8051F040/1/2/3/4/5/6/7
19.4.5. Status Register
The SMB0STA Status register holds an 8-bit status code indicating the current state of the SMBus0 inter-
face. There are 28 possible SMBus0 states, each with a corresponding unique status code. The five most
significant bits of the status code vary while the three least-significant bits of a valid status code are fixed at
zero when SI = ‘1’. Therefore, all possible status codes are multiples of eight. This facilitates the use of sta-
tus codes in software as an index used to branch to appropriate service routines (allowing 8 bytes of code
to service the state or jump to a more extensive service routine).
For the purposes of user software, the contents of the SMB0STA register is only defined when the SI flag is
logic 1. Software should never write to the SMB0STA register; doing so will yield indeterminate results. The
28 SMBus0 states, along with their corresponding status codes, are given in Table 19.1.
250
Bits7-1:
Bit0:
SLV6
R/W
Bit7
SLV6-SLV0: SMBus0 Slave Address.
These bits are loaded with the 7-bit slave address to which SMBus0 will respond when oper-
ating as a slave transmitter or slave receiver. SLV6 is the most significant bit of the address
and corresponds to the first bit of the address byte received.
GC: General Call Address Enable.
This bit is used to enable general call address (0x00) recognition.
0: General call address is ignored.
1: General call address is recognized.
SLV5
R/W
Bit6
SFR Definition 19.4. SMB0ADR: SMBus0 Address
SLV4
R/W
Bit5
SLV3
R/W
Bit4
Rev. 1.5
SLV2
R/W
Bit3
SLV1
R/W
Bit2
SLV0
R/W
Bit1
SFR Address:
SFR Page:
R/W
GC
Bit0
0xC3
0
00000000
Reset Value
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