C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 131

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C8051F018-GQR

Manufacturer Part Number
C8051F018-GQR
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F018-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
17.2.2. Mode 1: 16-bit Counter/Timer with Auto-Reload
The Counter/Timer with Auto-Reload mode sets the TF2 timer overflow flag when the counter/timer register
overflows from 0xFFFF to 0x0000. An interrupt is generated if enabled. On overflow, the 16-bit value held in the
two capture registers (RCAP2H, RCAP2L) is automatically loaded into the counter/timer register and the timer is
restarted.
Counter/Timer with Auto-Reload mode is selected by clearing the CP/RL2 bit. Setting TR2 to logic 1 enables and
starts the timer. Timer 2 can use either the system clock or transitions on an external input pin as its clock source, as
specified by the C/T2 bit. If EXEN2 is set to logic 1, a high-to-low transition on T2EX will also cause Timer 2 to
be reloaded. If EXEN2 is cleared, transitions on T2EX will be ignored.
131
SYSCLK
C8051F018
C8051F019
T2EX
T2
Crossbar
Crossbar
12
EXEN2
TR2
0
1
Figure 17.12. T2 Mode 1 Block Diagram
0
1
CKCON
M
T
2
M
T
1
M
T
0
Rev. 1.2
Reload
TCLK
RCAP2L
TL2
RCAP2H
TH2
CP/RL2
EXEN2
RCLK
TCLK
EXF2
C/T2
TR2
TF2
Interrupt

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