C8051F018-GQR Silicon Laboratories Inc, C8051F018-GQR Datasheet - Page 140

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C8051F018-GQR

Manufacturer Part Number
C8051F018-GQR
Description
IC 8051 MCU 16K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Datasheets

Specifications of C8051F018-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F018-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
18.1.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer is compared to the module’s 16-bit capture/compare register
(PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to
logic 1 and an interrupt request is generated if CCF interrupts are enabled. The CCFn bit is not automatically
cleared by hardware when the CPU vectors to the interrupt service routine, and must be cleared by software.
Setting the ECOMn and MATn bits in the PCA0CPMn register enables Software Timer mode.
18.1.3. High Speed Output Mode
In this mode, each time a match occurs between the PCA Timer Counter and a module’s 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn) the logic level on the module’s associated CEXn pin will toggle. Setting the
TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High-Speed Output mode.
PCA0CPLn
Write to
Reset
PCA0CPLn
Write to
PCA0CPHn
Reset
Write to
PCA0CPHn
Write to
0
ENB
ENB
1
0
1
ENB
ENB
PCA
Timebase
Figure 18.5. PCA High Speed Output Mode Diagram
Figure 18.4. PCA Software Timer Mode Diagram
Enable
E
C
O
M
n
PCA0CPMn
C
A
P
P
n
0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
C
O
M
E
n
PCA0CPLn
W
PCA0CPMn
P
M
n
C
A
P
P
n
0 0
PCA0L
E
C
C
F
n
x
C
A
P
N
n
Enable
16-bit Comparator
M
A
T
n
O
G
T
n
W
M
P
n
0 x
PCA
Timebase
E
C
C
F
n
PCA0CPHn
PCA0H
Rev. 1.2
PCA0CPLn
PCA0L
16-bit Comparator
Match
Toggle
PCA0CPHn
PCA0H
C
F
C
R
PCA0CN
TOGn
0
1
C
C
F
4
C
C
F
3
0
1
C
C
F
2
PCA Interrupt
CEXn
C
C
F
1
C
C
F
0
Match
Crossbar
C8051F018
C8051F019
C
F
C
R
PCA0CN
0
1
C
C
F
4
C
C
F
3
Port I/O
C
C
F
2
PCA Interrupt
C
C
F
1
C
C
F
0
140

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