MCF5328CVM240J Freescale Semiconductor, MCF5328CVM240J Datasheet - Page 14
MCF5328CVM240J
Manufacturer Part Number
MCF5328CVM240J
Description
IC MPU RISC 240MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF532xr
Datasheet
1.MCF5328CVM240J.pdf
(50 pages)
Specifications of MCF5328CVM240J
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, LCD, PWM, WDT
Number Of I /o
94
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Family Name
MPC5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
240MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.6/1.95/2.75/3.6V
Operating Supply Voltage (min)
1.4/1.7/2.25/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Processor Series
MCF532xx
Core
ColdFire V3
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5328CVM240J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
M
A
B
C
D
E
F
G
H
K
N
P
R SD_CLK SD_CLK SD_RAS
T
J
L
SD_DR
DT2IN
DT3IN
DQS3
_DQS
FEC_
TXER
FEC_
FEC_
TXD1
MDC
SSI_
TXD
SD_
CS0
D13
SD_
D31
D27
NC
NC
D9
1
1
Pin Assignments and Reset States
4.2
Figure 4
14
Figure 4. MCF5328CVM240, MCF53281CVM240, and MCF5329CVM240 Pinout Top View (256 MAPBGA)
SD_CKE
SD_A10
FB_CLK
TXCLK
DT1IN
TXEN
MDIO
FEC_
FEC_
FEC_
FEC_
TXD2
I2C_
SSI_
RXD
SDA
D14
D10
D30
D26
D8
2
2
shows a pinout of the MCF5328CVM240, MCF53281CVM240, and MCF5329CVM240 devices.
Pinout—256 MAPBGA
SD_CAS
SD_WE
SSI_FS
DT0IN
BWE1
LCD_
LCD_
LCD_
FEC_
TXD3
I2C_
SCL
D15
D11
D29
D25
D23
BE/
D4
D1
D0
3
3
The pin at location N13 (PLL_TEST) must be left floating or improper operation of the
PLL module occurs.
SD_CS1 SD_VDD SD_VDD
RXER
MCLK
BWE3
LCD_
LCD_
LCD_
FEC_
FEC_
TXD0
BCLK
SSI_
SSI_
D12
D28
D24
D22
D21
D20
BE/
D5
D3
D2
TS
4
4
SD_VDD SD_VDD
SD_VDD SD_VDD SD_VDD SD_VDD
EVDD
EVDD
EVDD
LCD_
LCD_
LCD_
LCD_
IVDD
IVDD
D19
D18
D17
D16
D9
D8
D7
D6
5
5
MCF532x ColdFire
SD_VDD SD_VDD
EVDD
EVDD
EVDD
BWE0
BWE2
FEC_
RXD2
FEC_
RXD1
FEC_
RXD0
LCD_
LCD_
DQS2
D11
D10
SD_
BE/
BE/
D7
6
6
RXD3
EVDD
LCD_
LCD_
LCD_
LCD_
FEC_
VSS
VSS
VSS
VSS
D15
D14
D13
D12
D6
D5
D4
D3
7
7
®
RXCLK
RCON
EVDD
EVDD
FEC_
FEC_
FEC_
FEC_
RXDV
Microprocessor Data Sheet, Rev. 5
COL
CRS
VSS
VSS
VSS
VSS
R/W
D2
D1
D0
8
8
NOTE
NOTE
SD_VDD
SD_VDD SD_VDD
ACD/OE
PSTCLK
DDATA3
DDATA2
EVDD
EVDD
TCLK/
LCD_
LCD_
LCD_
LCD_
VSS
VSS
VSS
VSS
CLS
D17
D16
OE
9
9
LCD_FLM/
LCD_CON
LCD_LP/
DDATA1
DDATA0
HSYNC
VSYNC
TRAST
LSCLK
U1RTS
EVDD
EVDD
LCD_
PST3
PST2
VSS
VSS
VSS
VSS
10
10
SPL_SPR
SD_VDD
SD_VDD
SD_VDD
U1CTS
U1TXD
QSPI_
EVDD
EVDD
EVDD
LCD_
LCD_
LCD_
PST1
PST0
IVDD
TDO/
DSO
REV
CS0
PS
11
11
FB_CS3 FB_CS4
FB_CS2 FB_CS5
FB_CS1
FB_CS0
U1RXD
DRAM
QSPI_
QSPI_
QSPI_
QSPI_
EVDD
DOUT
IVDD
IVDD
PLL_
VDD
VSS
SEL
CLK
CS2
DIN
NC
12
12
PWM7
EXTAL
JTAG_
QSPI_
USB_
TEST
IRQ7
PLL_
PLL_
XTAL
VSS
VSS
CS1
A23
A22
A21
32K
32K
EN
A6
TA
13
13
Freescale Semiconductor
USBHOST
USBOTG
RSTOUT
TDI/DSI
U0RXD
U0TXD
PWM5
_VDD
_VSS
IRQ6
IRQ3
A20
A19
A18
A15
14
A9
A5
A0
14
HOST_M
OTG_M
RESET
DSCLK
U0CTS
U0RTS
PWM3
TRST/
IRQ5
IRQ2
USB
USB
A17
A16
A13
A11
15
A8
A4
A1
15
HOST_P
OTG_P
PWM1
EXTAL
TEST
BKPT
IRQ4
IRQ1
XTAL
TMS/
USB
USB
A14
A12
A10
NC
A7
A3
A2
16
16
M
A
B
C
D
E
F
G
H
K
N
P
R
T
J
L