MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 32

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Electrical Characteristics
7.10
MII signals use TTL signal levels compatible with devices operating at either 5.0 V or 3.3 V.
7.10.1
The receiver functions correctly up to a ERXCLK maximum frequency of 25 MHz +1%. The processor
clock frequency must exceed twice the ERXCLK frequency.
Table 18
Figure 16
32
I2C_SDA
I2C_SCL
Num
M1
M2
M3
M4
lists MII receive channel timings.
Fast Ethernet AC Timing Specifications
shows MII receive signal timings listed in
ERXD[3:0] (inputs)
MII Receive Signal Timing (ERXD[3:0], ERXDV, ERXER, and
ERXCLK)
ERXCLK (input)
ERXD[3:0], ERXDV, ERXER to ERXCLK setup
ERXCLK to ERXD[3:0], ERXDV, ERXER hold
ERXCLK pulse width high
ERXCLK pulse width low
I1
ERXER
ERXDV
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4
I2
Figure 16. MII Receive Signal Timing Diagram
I4
Characteristic
Figure 15. I
Table 18. MII Receive Signal Timing
M1
I6
2
M2
C Input/Output Timings
M3
I7
Table
18.
I8
M4
35%
35%
Min
5
5
I5
65%
65%
Max
—
—
I3
Freescale Semiconductor
ERXCLK period
ERXCLK period
I9
Unit
ns
ns