R5F21237JFP Renesas Electronics America, R5F21237JFP Datasheet - Page 200

MCU 3/5V 48K+2K 48-LQFP

R5F21237JFP

Manufacturer Part Number
R5F21237JFP
Description
MCU 3/5V 48K+2K 48-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/23r
Datasheet

Specifications of R5F21237JFP

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Renesas Electronics America
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Part Number:
R5F21237JFP#V0
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
14.3.4
In the output compare function, PWM mode, reset synchronous PWM mode, complementary PWM mode and
PWM3 mode, the TRDIOji output pin can be forcibly set to the programmable I/O port by the INT0 pin input,
and pulse output can be cut off.
The used pins for the output in these functions or modes can function as the output pin of Timer RD when
setting the applicable bit in the TRDOER1 register to 0 (enable Timer RD output). When the PTO bit in the
TRDOER2 register to 1 (INT0 of pulse output forced cutoff signal input enabled), all bits in the TRDOER1
register are set to 1 (disable Timer RD output, the TRDIOji output pin is used as the programmable I/O port)
after “L” is applied to the INT0 pin. The TRDIOji output pin is set to the programmable I/O port after “L” is
applied to the INT0 pin and waiting for 1 to 2 cycles of the Timer RD operation clock (refer to Table 14.11
Timer RD Operation Clocks).
Set as below when using this function:
According to the selection of the POL bit in the INT0IC register and change of the INT0 pin input, the IR bit in
the INT0IC register is set to 1 (interrupt request). Refer to 12. Interrupts for details of interrupts.
• Set the pin status (high impedance, “L” or “H” output) with the pulse output forced cutoff by the P2 and
• Set the INT0EN bit in the INTEN register to 1 (enable INT0 input) and the INT0PL bit to 0 (one edge).
• Set the PD4_5 bit in the PD4 register to 0 (input mode).
• Set the INT0 digital filter by the INT0F1 to INT0F0 bits in the INTF register.
• Set the PTO bit in the TRDOER2 register to 1 (enable pulse output forced cutoff signal input INT0).
PD2 registers.
Pulse Output Forced Cutoff
Page 178 of 501
14. Timers

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