C8051F012-GQ Silicon Laboratories Inc, C8051F012-GQ Datasheet - Page 169
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C8051F012-GQ
Manufacturer Part Number
C8051F012-GQ
Description
IC 8051 MCU 32K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F01xr
Specifications of C8051F012-GQ
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
8
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F005DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
On-chip Dac
12 bit, 2 Channel
Data Rom Size
32 KB
A/d Bit Size
10 bit
A/d Channels Available
4
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1193
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F012-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F012-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
169
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
DATA7
This register is used to read or write data to the Flash memory across the JTAG interface.
Bits9-2: DATA7-0: Flash Data Byte.
Bit1:
Bit0:
This register controls the Flash read timing circuit and the prescaler required to generate the correct
timing for Flash operations.
Bit7:
Bit6:
Bits5-4: UNUSED. Read = 00b, Write = don’t care.
Bits3-0: FLSCL3-0: Flash Prescaler Control Bits.
Bit9
FOSE
Bit7
FAIL: Flash Fail Bit.
0:
1:
0:
1:
0: Flash read strobe is a full clock-cycle wide.
1: Flash read strobe is 50nsec.
0: The Flash output enable and sense amplifier enable are on only when needed to read the
1: The Flash output enable and sense amplifier enable are always on. This can be used to
The FLSCL3-0 bits control the prescaler used to generate timing signals for Flash
operations. Its value should be written before any Flash operations are initiated. The value
written should be the smallest integer for which:
Where f
disallowed when FLSCL[3:0] = 1111b.
FBUSY: Flash Busy Bit.
FOSE: Flash One-Shot Enable Bit.
FRAE: Flash Read Always Bit.
DATA6
Bit8
Flash memory.
limit the variations in digital supply current due to switching the sense amplifiers, thereby
reducing digitally induced noise.
FRAE
Bit6
Previous Flash memory operation was successful.
Previous Flash memory operation failed. Usually indicates the associated memory
location was locked.
Flash interface logic is not busy.
Flash interface logic is processing a request. Reads or writes while FBUSY = 1 will
not initiate another operation
SYSCLK
FLSCL[3:0] > log
DATA5
Figure 21.5. FLASHDAT: JTAG Flash Data Register
Figure 21.6. FLASHSCL: JTAG Flash Scale Register
Bit7
is the system clock frequency. All Flash read/write/erase operations are
Bit5
-
DATA4
Bit6
2
(f
SYSCLK
DATA3
Bit4
Bit5
-
/ 50kHz)
Rev. 1.7
DATA2
FLSCL3
Bit4
Bit3
DATA1
Bit3
FLSCL2
Bit2
DATA0
Bit2
FLSCL1
Bit1
FAIL
Bit1
FLSCL0
FBUSY
Bit0
Bit0
Reset Value
Reset Value
0000000000
00000000