MCF5249LCAG120 Freescale Semiconductor, MCF5249LCAG120 Datasheet - Page 284

• Manufacturer Part Number: MCF5249LCAG120
• Description: IC MPU 32BIT COLDF 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF524xr

Specifications of MCF5249LCAG120

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: I²C, IDE, MMC, SPI, UART/USART
• Peripherals: DMA, I²S, POR, Serial Audio, WDT
• Number Of I /o: 34
• Program Memory Type: ROMless
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MCF524x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Number Of Programmable I/os: 47
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 8KB
• Cpu Speed: 120MHz
• Embedded Interface Type: I2C, QSPI, UART
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Rohs Compliant: Yes
• For Use With: M5249C3 - KIT EVAL FOR M5249 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

EbuIn2
EbuIn3
EbuIn4
sdatao2
sdatao1
EbuIn1
sdatai4
sdatai3
sdatai1
sclk2
lrck2
sclk3
lrck3
sclk4
lrck4
sclk1
lrck1
Bypass select
IIS2
Transmit
IIS2
clock gen
IIS2
Control
IIS1
Transmit
IIS 1
clock gen
IIS1
Control
IIS3
clock gen
IIS3
Control
IIS4
clock gen
IIS4
Control
IIS1
Receive
IIS3
Receive
IIS4
Receive
Source
Select
31a
18
18a
10
11
6
8
7
5
1
3
4
6
8
9
EBU
Receive
Block
EBU
Receive
Block
Freescale Semiconductor, Inc.
2
For More Information On This Product,
iis4RcvData(39:0)
IIS2 Tx
Fifo
IIS1 Tx
Fifo
iis3RcvData(39:0)
iis1RcvData(39:0)
6 fields
6 fields
Source Select
19
14
IIS1 Tx
Source Select
12
ebuRcvData2
ebuRcvData1
Go to: www.freescale.com
IIS2 Tx
13
15
0
0
Internal
Audio
Data
Bus
23
(To FreqMeas block)
ebuExtractedClock
PDOR3e
PDIR2
Source
Select
Ebu Tx
Source
Select
PDOR1
0
0
0
PDOR2
16a
16b
0
16
24
32-bit EBU "C" channel
ebuRcvUChannelStream
32-bit EBU "c" channel
ebuTxUChannelStream
Clock Select
EBU Tx
Fifo
Block
Encoder
PDIR2
FIFO
PDIR1
FIFO
PDIR1
FIFO
6 fields
6 fields
6 fields
Reg
6 fields
101
Reg
17a
17b
17
25
PDIR1
register
(read-only)
PDIR3
register
(read-only)
Block
Decoder
PDOR1 register
(write only)
PDOR2 register
(write only)
PDOR3
register
(write-only)
ebuOff
EBU
clock gen
100
EBU
Tx
Block
PDIR2
register
(Read-only)
22
26
27
28
30
29
Memory-mapped
ColdFire processo
bus
(read only)
(read only)
(write only)
(write only)
31
ebuOut1
ebuOut2