M30280F6HP#U9B Renesas Electronics America, M30280F6HP#U9B Datasheet - Page 72

IC M16C/28 MCU FLASH 48K 80LQFP

M30280F6HP#U9B

Manufacturer Part Number
M30280F6HP#U9B
Description
IC M16C/28 MCU FLASH 48K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30280F6HP#U9B

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
e
E
1
. v
J
Figure 7.7 PLC0 Register
6
0
C
2
9
0 .
2 /
B
0
0
8
0
PLL Control Register 0
NOTES:
4
G
b7
J
7
a
1. Write to this register after setting the PRC0 bit of PRCR register to "1" (write enable).
2. When the PM21 bit in the PM2 register is "1" (clock modification disable), writing to this register has no effect.
3. These three bits can only be modified when the PLC07 bit is set to "0" (PLL turned off). The value once written to
4. Before setting this bit to "1" , set the CM07 bit to "0" (main clock), set the CM17 to CM16 bits to "00
o r
0 -
. n
0
b6
clock undivided mode), and set the CM06 bit to "0" (CM16 and CM17 bits enable).
u
this bit cannot be modified.
2
3
p
0
, 1
0 1
b5
0
(
M
2
b4
0
1
0
6
7
b3
C
2 /
b2
, 8
page 50
b1
M
1
b0
6
C
PLC00
PLC01
PLC02
PLC07
f o
2 /
Symbol
(b6-b5)
(b4)
(b3)
Bit
8
3
Symbol
PLC0
) B
8
5
(1,2)
PLL multiplying factor
select bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Operation enable bit
Reserved bit
Reserved bit
Bit Name
Address
001C
(3)
16
(4)
b2
Set to "1"
Set to "0"
0: PLL Off
1: PLL On
0 0 0:
0 0 1: Multiply by 2
0 1 0: Multiply by 4
0 1 1:
1 0 0:
1 0 1:
1 1 0:
1 1 1:
b1b0
Do not set
Do not set
After Reset
0001 X010
Function
2
7. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RW
2
" (main

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