MCF5213CAF66 Freescale Semiconductor, MCF5213CAF66 Datasheet - Page 36

IC MCU 256K FLASH 66MHZ 100-LQFP

MCF5213CAF66

Manufacturer Part Number
MCF5213CAF66
Description
IC MCU 256K FLASH 66MHZ 100-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5213CAF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
55
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Cpu Family
MCF521x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
I2C/QSPI/UART
Total Internal Ram Size
32KB
# I/os (max)
56
Number Of Timers - General Purpose
10
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Package
100LQFP
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
56
Number Of Timers
10
Processor Series
MCF521x
Core
ColdFire V2
Data Ram Size
32 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Minimum Operating Temperature
- 40 C
For Use With
M5213EVBE - KIT EVAL FOR MCF5213M5211DEMO - KIT DEMO FOR MCF5211
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Electrical Characteristics
Figure 7
2.12
Table 34
36
V
Name
V
V
t
V
f
RES
DNL
t
t
C
R
ADPU
t
INL
INL
ADIC
REFH
REC
ADC
REFL
ADIN
ADS
DDA
ADI
AD
shows timing for the values in
lists specifications for the analog-to-digital converter.
SDA
SCL
1
2
3
Analog-to-Digital Converter (ADC) Parameters
Low reference voltage
High reference voltage
ADC analog supply voltage
Input voltages
Resolution
Integral non-linearity (full input signal range)
Integral non-linearity (10% to 90% input signal range)
Differential non-linearity
ADC internal clock
Conversion range
ADC power-up time
Recovery from auto standby
Conversion time
Sample time
Input capacitance
Output numbers depend on the value programmed into the IFDR; an IFDR programmed with the
maximum frequency (IFDR = 0x20) results in minimum output timings as shown in
interface is designed to scale the actual data transition time to move it to the middle of the SCL low
period. The actual position is affected by the prescale and division values programmed into the IFDR;
however, the numbers given in
Because SCL and SDA are open-collector-type outputs, which the processor can only actively drive
low, the time SCL or SDA take to reach a high level depends on external signal capacitance and pull-up
resistor values.
Specified at a nominal 50-pF load.
I1
Monotonicity
5
I2
Characteristic
Table 32
I4
MCF5213 ColdFire Microcontroller, Rev. 4
Figure 7. I
Table 33
Table 34. ADC Parameters
and
Table
I6
are minimum values.
2
C Input/Output Timings
2
33.
I7
4
V
V
V
V
Min
3.0
REFL
0.1
REFL
12
SSA
DDA
1
I8
–1 < DNL < +1
See
Typical
±2.5
±2.5
Figure 8
3.3
GUARANTEED
6
0
6
1
I5
I3
Table
Freescale Semiconductor
33. The I
V
V
V
V
Max
<+1
REFH
REFH
3.6
5.0
12
±3
±3
13
SSA
DDA
1
I9
2
C
t
t
t
t
AIC
AIC
AIC
AIC
LSB
MHz
Unit
LSB
LSB
Bits
cycles
pF
cycles
cycles
cycles
V
V
V
V
V
3
6

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