DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 126
![IC H8S MCU FLASH 128K 100-QFP](/photos/28/61/286108/100-tqfp_sml.jpg)
DF2148BTE20
Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2148BTE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20
HD64F2148BTE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 Instruction Descriptions
2.2.29 (2)
EEPMOV (MOVe data to EEPROM)
Operation
if R4
else next;
Assembly-Language Format
EEPMOV.W
Operand Size
—
Description
This instruction performs a block data transfer. It moves data from the memory location specified
in ER5 to the memory location specified in ER6, increments ER5 and ER6, decrements R4, and
repeats these operations until R4 reaches zero. Execution then proceeds to the next instruction.
The data transfer is performed a byte at a time, with R4 indicating the number of bytes to be
transferred. The word symbol in the assembly-language format designates the size of R4 (allowing
a maximum 65535 bytes to be transferred). All interrupts are detected while the block transfer is
in progress.
If no interrupt occurs while the EEPMOV.W instruction is executing, when the EEPMOV.W
instruction ends, R4 contains 0 (zero), and ER5 and ER6 contain the last transfer address + 1.
If an interrupt occurs, interrupt exception handling begins after the current byte has been
transferred. R4 indicates the number of bytes remaining to be transferred. ER5 and ER6 indicate
the next transfer addresses. The program counter value pushed onto the stack in interrupt
exception handling is the address of the next instruction after the EEPMOV.W instruction.
See the note on EEPMOV.W instruction and interrupt.
Rev. 4.00 Feb 24, 2006 page 110 of 322
REJ09B0139-0400
repeat @ER5+
until R4 = 0
0 then
R4 – 1
EEPMOV (W)
R4
@ER6+
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
—
I
UI H
—
—
—
U
—
N
Block Data Transfer
—
Z
— —
V
C
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