DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 326
DF2148ATE20
Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of DF2148ATE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20
HD64F2148ATE20
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
DF2148ATE20IV
Manufacturer:
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Section 3 Processing States
3.2
When the RES input goes low all current processing stops and the CPU enters the reset state.
Reset exception handling starts when the RES signal changes from low to high.
The reset state can also be entered by a watchdog timer overflow. For details, refer to the relevant
microcontroller hardware manual.
Rev. 4.00 Feb 24, 2006 page 310 of 322
REJ09B0139-0400
Notes: 1.
RES = high
Exception-handling state
Reset State
2.
Bus-released state
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low.
From any state, a transition to hardware standby mode occurs when STBY goes low.
Reset state
End of bus
request
End of
exception
handling
*1
Bus
request
Figure 3.2 State Transitions
STBY = high, RES = low
External interrupt
Request for
exception
handling
Program execution
End of bus request
Bus request
state
Interrupt
request
SLEEP
instruction
with
SSBY = 1
Hardware standby mode
SLEEP
instruction
with
SSBY = 0
Software standby mode
Power-down state
Sleep mode
*2
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