MC912DG128AVPVE Freescale Semiconductor, MC912DG128AVPVE Datasheet - Page 256
![IC MCU 128K FLASH 8MHZ 112-LQFP](/photos/38/0/380047/lqfp-112_sml.jpg)
MC912DG128AVPVE
Manufacturer Part Number
MC912DG128AVPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DG128AVPVE
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 8 Channel)
Package
112LQFP
Family Name
HC12
Maximum Speed
8 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC912DG128AVPVE
Manufacturer:
FREESCALE
Quantity:
2 300
Company:
Part Number:
MC912DG128AVPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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TCTL4 — Timer Control Register 4
TMSK1 — Timer Interrupt Mask 1
TCTL3 — Timer Control Register 3
Enhanced Capture Timer
Technical Data
256
RESET:
RESET:
RESET:
EDG3B
EDG7B
Bit 7
Bit 7
Bit 7
C7I
0
0
0
EDG7A
EDG3A
C6I
6
0
6
0
6
0
Read or write anytime.
EDGnB, EDGnA — Input Capture Edge Control
Read or write anytime.
The bits in TMSK1 correspond bit-for-bit with the bits in the TFLG1 status
register. If cleared, the corresponding flag is disabled from causing a
hardware interrupt. If set, the corresponding flag is enabled to cause a
hardware interrupt.
Read or write anytime.
C7I–C0I — Input Capture/Output Compare “x” Interrupt Enable.
These eight pairs of control bits configure the input capture edge
detector circuits.
Freescale Semiconductor, Inc.
For More Information On This Product,
EDG6B
EDG2B
C5I
5
0
5
0
5
0
Table 15-2. Edge Detector Circuit Configuration
EDGnB
Go to: www.freescale.com
Enhanced Capture Timer
0
0
1
1
EDG6A
EDG2A
C4I
4
0
4
0
4
0
EDGnA
0
1
0
1
EDG5B
EDG1B
C3I
3
0
3
0
3
0
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
EDG5A
EDG1A
C2I
2
0
2
0
2
0
Configuration
MC68HC912DT128A — Rev 4.0
EDG4B
EDG0B
C1I
1
0
1
0
1
0
EDG4A
EDG0A
Bit 0
Bit 0
Bit 0
C0I
0
0
0
MOTOROLA
$008B
$008A
$008C
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