MC711K4CFNE3 Freescale Semiconductor, MC711K4CFNE3 Datasheet - Page 47

• Manufacturer Part Number: MC711K4CFNE3
• Description: IC MCU 8BIT 24K EPROM 84-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC711K4CFNE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: OTP
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3.1 Accumulators A, B, and D (ACCA, ACCB, and ACCD)
3.3.2 Index Register X (IX)
3.3.3 Index Register Y (IY)
M68HC11K Family
MOTOROLA
Accumulators A and B are general-purpose 8-bit registers that hold
operands and results of arithmetic calculations or data manipulations.
Some instructions treat these two accumulators as a single double-byte
(16-bit) accumulator called accumulator D. Most operations can use
either accumulator A or B, with these exceptions:
The IX register provides a 16-bit indexing value that can be added to the
8-bit offset provided in an instruction to create an effective address. The
IX register can be used also as a counter or as a temporary storage
register.
The IY register provides a 16-bit indexed mode function similar to that of
the IX register. Instructions using the IY register require an extra byte of
machine code and an extra cycle of execution time because of the way
the opcode map is implemented.
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The ABX and ABY instructions add the contents of 8-bit
accumulator B to the contents of 16-bit register X or Y, but there
are no equivalent instructions that use A instead of B.
The TAP and TPA instructions transfer data from accumulator A
to the condition code register or from the condition code register
to accumulator A. However, there are no equivalent instructions
that use B rather than A.
The DAA instruction adjusts accumulator A after binary-coded
decimal (BCD) arithmetic operations, but there is no equivalent
BCD instruction to adjust accumulator B.
The add, subtract, and compare instructions associated with both
A and B (ABA, SBA, and CBA) only operate in one direction,
making planning ahead important to ensure the correct operand is
in the correct accumulator.
Central Processor Unit (CPU)
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Central Processor Unit (CPU)
CPU Registers
Technical Data
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