M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 158

MCU 5V 256K T-TEMP PB-FREE 100-Q

M306N4FGTFP#U0

Manufacturer Part Number
M306N4FGTFP#U0
Description
MCU 5V 256K T-TEMP PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP#U0

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 14.4 Registers IDB0, IDB1, and DTT
Dead Time Timer
Three-Phase Output Buffer Register i (i = 0, 1)
NOTE:
NOTES:
b7
b7
0 0
Apr 14, 2006
1. The values of registers IDB0 and IDB1 are transferred to the three-phase output shift register by a transfer
1. Use the MOV instruction to set the DTT register.
2. The DTT register is enabled when the INV15 bit in the INVC1 register is set to 0 (dead time enabled).
b6
trigger.
After the transfer trigger occurs, the values written in the IDB0 register determine each phase output signal
first. Then the value written in the IDB1 register on the falling edge of timers A1, A2, and A4 one-shot
pulse determines each phase output signal.
No dead time can be set when the INV15 bit is set to 1 (dead time disabled). The INV06 bit in the INVC0
register determines start trigger of the DTT register.
b5
b4
b3
page 134 of 376
b2
b1
(1) (2)
b0
b0
If setting value is n , the timer stops when counting
n times a count source selected by the INV12 bit
in the INVC1 register after start trigger occurs.
Positive or negative phase, which changes from
inactive level to active level, shifts when the dead
time timer stops.
Symbol
(b7-b6)
DWBi
DUBi
DVBi
DWi
DUi
DVi
Bit
-
IDB0, IDB1
Symbol
DTT
Symbol
U-phase output buffer i
U-phase output buffer i
V-phase output buffer i
V-phase output buffer i
W-phase output buffer i
W-phase output buffer i
Reserved bits
Bit Name
Function
01CAh, 01CBh
Address
01CCh
Address
(1)
14. Three-Phase Motor Control Timer Function
Write output level
0: Active level
1: Inactive level
When read, the value of the three-
phase shift register is read.
Set to 0
Function
Setting Range
After Reset
00111111b
1 to 255
After Reset
Undefined
WO
RW
RW
RW
RW
RW
RW
RW
RW
RO

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