M30624FGNHP#U5 Renesas Electronics America, M30624FGNHP#U5 Datasheet - Page 209
M30624FGNHP#U5
Manufacturer Part Number
M30624FGNHP#U5
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet
1.M30620FCNGPU5.pdf
(250 pages)
Specifications of M30624FGNHP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Functions To Inhibit Rewriting Flash Memory Version (Flash Memory Version)
Functions To Inhibit Rewriting Flash Memory Version
Figure 1.30.1. ROM code protect control address
To prevent the contents of the flash memory version from being read out or rewritten easily, the device
incorporates a ROM code protect function for use in parallel I/O mode and an ID code check function for
use in standard serial I/O mode.
ROM code protect function
The ROM code protect function is used to prohibit reading out or modifying the contents of the flash
memory during parallel I/O mode and is set by using the ROM code protect control address register
(0FFFFF
ists in the user ROM area.)
If one of the pair of ROM code protect bits is set to 0, ROM code protect is turned on, so that the contents
of the flash memory version are protected against readout and modification.
If both of the two ROM code protect reset bits are set to “00,” ROM code protect is turned off, so that the
contents of the flash memory version can be read out or modified. Once ROM code protect is turned on,
the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/
O or some other mode to rewrite the contents of the ROM code protect reset bits.
ROM code protect control address
b7
b6
b5
Note 1: When ROM code protect is turned on, the on-chip flash memory is protected against
Note 2: The ROM code protect reset bits can be used to turn off ROM code protect level 1.
16
b4
). Figure 1.30.1 shows the ROM code protect control address (0FFFFF
b3
1
readout or modification in parallel input/output mode.
However, since these bits cannot be changed in parallel input/output mode, they need to
be rewritten in serial input/output or some other mode.
b2
1
b1
1
b0
1
Bit symbol
ROMCP1
Reserved bit
ROMCR
Symbol
ROMCP
ROM code protect reset
bit (Note 2)
ROM code protect level
1 set bit (Note 1)
0FFFFF
Address
Bit name
16
When reset
b5 b4
0 0: Protect removed
0 1: Protect set bit effective
1 0: Protect set bit effective
1 1: Protect set bit effective
b7 b6
0 0: Protect enabled
0 1: Protect enabled
1 0: Protect enabled
1 1: Protect disabled
FF
Always set this bit to 1.
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Function
16
M16C / 62N Group
). (This address ex-
Mitsubishi microcomputers
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