MC912DG128ACPVE Freescale Semiconductor, MC912DG128ACPVE Datasheet - Page 344
MC912DG128ACPVE
Manufacturer Part Number
MC912DG128ACPVE
Description
IC MCU 128K FLASH 8MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet
1.MC912DG128ACPVER.pdf
(478 pages)
Specifications of MC912DG128ACPVE
Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
HC912D
Core
HC12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Package
112LQFP
Family Name
HC12
Maximum Speed
8 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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MSCAN Controller
Technical Data
344
The synchronization jump width can be programmed in a range of 1 to 4
time quanta by setting the SJW parameter.
Above parameters can be set by programming the bus timing registers
(CBTR0–1, see
msCAN12 Bus Timing Register 1
It is the user’s responsibility to make sure that his bit time settings are in
compliance with the CAN standard.
the CAN conforming segment settings and the related parameter values.
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Time segment 1: This segment includes the PROP_SEG and the
PHASE_SEG1 of the CAN standard. It can be programmed by
setting the parameter TSEG1 to consist of 4 to 16 time quanta.
Time segment 2: This segment represents the PHASE_SEG2 of
the CAN standard. It can be programmed by setting the TSEG2
parameter to be 2 to 8 time quanta long.
Transmit point
SYNC
_SEG
1
Go to: www.freescale.com
Figure 18-8. Segments within the Bit Time
NRZ Signal
MSCAN Controller
msCAN12 Bus Timing Register 0 (CBTR0)
(PROP_SEG + PHASE_SEG1)
8... 25 Time Quanta
= 1 Bit Time
Time segment 1
4 ... 16
(CBTR1)).
Figure 18-9
MC68HC912DT128A — Rev 4.0
gives an overview on
Sample point
(single or triple sampling)
(PHASE_SEG2)
Time Seg. 2
2 ... 8
and
MOTOROLA
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