MAXQ610A-0000+ Maxim Integrated Products, MAXQ610A-0000+ Datasheet - Page 22

• Manufacturer Part Number: MAXQ610A-0000+
• Description: IC MCU 16BIT 64K IR MOD 32TQFN
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ610A-0000+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-TQFN Exposed Pad
• Processor Series: MAXQ610
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 12 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Controller Family/series: MAXQ
• No. Of I/o's: 24
• Ram Memory Size: 2048Byte
• Cpu Speed: 12MHz
• No. Of Timers: 2
• Embedded Interface Type: JTAG, SPI, USART
• Rohs Compliant: Yes
• Number Of Programmable I/os: 32
• Development Tools By Supplier: MAXQ610-KIT
• Package: 32TQFN EP
• Family Name: MAXQ
• Maximum Speed: 12 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 90-M6800+B01

16-Bit Microcontroller with Infrared Module
The lowest power mode of operation for the MAXQ610
is stop mode. In this mode, CPU state and memories
are preserved, but the CPU is not actively running.
Wake-up sources include external I/O interrupts, the
power-fail warning interrupt, or a power-fail reset. Any
time the microcontroller is in a state where code does
not need to be executed, the user software can put the
MAXQ610 into stop mode. The nanopower ring oscilla-
tor is an internal ultra-low-power (400nA), 8kHz ring
oscillator that can be used to drive a wake-up timer that
exits stop mode. The wake-up timer is programmable
by software in steps of 125µs up to approximately 8s.
The power-fail monitor is always on during normal oper-
ation. However, it can be selectively disabled during
stop mode to minimize power consumption. This fea-
ture is enabled using the power-fail monitor disable
Figure 11. Power-Fail Detection During Normal Operation
22
______________________________________________________________________________________
INTERNAL RESET
(ACTIVE HIGH)
V
V
V
PFW
POR
RST
V
DD
A
B
C
Operating Modes
t < t
D
PFW
t ≥ t
PFW
E
(PFD) bit in the PWCN register. The reset default state
for the PFD bit is 1, which disables the power-fail moni-
tor function during stop mode. If power-fail monitoring
is disabled (PFD = 1) during stop mode, the circuitry
responsible for generating a power-fail warning or reset
is shut down and neither condition is detected. Thus,
the V
However, in the event that V
level, a POR is generated. The power-fail monitor is
enabled prior to stop mode exit and before code exe-
cution begins. If a power-fail warning condition (V
V
set on stop mode exit. If a power-fail condition is
detected (V
Figures 11, 12, and 13 show the power-fail detection
and response during normal and stop mode operation.
PFW
DD
) is then detected, the power-fail interrupt flag is
t ≥ t
PFW
F
< V
DD
RST
< V
condition does not invoke a reset state.
RST
), the CPU goes into reset.
G
Power-Fail Detection
t ≥ t
DD
PFW
falls below the POR
H
I
DD
<