UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 147
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UPD70F3735GK-GAK-AX
Manufacturer Part Number
UPD70F3735GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3735GC-GAD-AX.pdf
(835 pages)
Specifications of UPD70F3735GK-GAK-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3735GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 147 of 835
- Download datasheet (5Mb)
V850ES/JF3-L
4.6
4.6.1
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(1) In the V850ES/JF3-L, the general-purpose port function and several peripheral function I/O pin share a pin. To
Cautions
switch between the general-purpose port (port mode) and the peripheral function I/O pin (alternate-function mode),
set by the PMCn register. In regards to this register setting sequence, note with caution the following.
(a) Cautions on switching from port mode to alternate-function mode
Cautions on setting port pins
To switch from the port mode to alternate-function mode in the following order.
<1> Set the PFn register
<2> Set the PFCn and PFCEn registers:
<3> Set the corresponding bit of the PMCn register to 1: Switch to alternate-function mode
<4> Set the INTRn and INTFn registers
If the PMCn register is set first, note with caution that, at that moment or depending on the change of the pin
states in accordance with the setting of the PFn, PFCn, and PFCEn registers, unexpected operations may
occur.
A concrete example is shown as Example below.
Notes 1. N-ch open-drain output pin only
Caution Regardless of the port mode/alternate-function mode, the Pn register is read and written as
[Example] SCL01 pin setting example
2. Only when the external interrupt function is selected
• Pn register read: Read the port output latch value (when PMn.PMnm bit = 0), or read the
• Pn register write: Write to the port output latch
follows.
The SCL01 pin is used alternately with the P41/SOB0 pin. Select the valid pin functions with the
PMC4, PFC4, and PF4 registers.
0
1
PMC41 Bit
Note 1
don’t care
0
1
:
PFC41 Bit
pin states (PMn.PMnm bit = 1).
Note 2
:
1
1
1
PF41 Bit
N-ch open-drain setting
Alternate-function selection
External interrupt setting
P41 (in output port mode, N-ch open-drain output)
SOB0 output (N-ch open-drain output)
SCL01 I/O (N-ch open-drain output)
CHAPTER 4 PORT FUNCTIONS
Valid Pin Functions
Page 131 of 816
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