SAK-XC2265N-40F80L Infineon Technologies, SAK-XC2265N-40F80L Datasheet - Page 115

no-image

SAK-XC2265N-40F80L

Manufacturer Part Number
SAK-XC2265N-40F80L
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC22xxNr

Specifications of SAK-XC2265N-40F80L

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LSQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000527774

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAK-XC2265N-40F80L
Manufacturer:
Infineon Technologies
Quantity:
10 000
Part Number:
SAK-XC2265N-40F80L
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
SAK-XC2265N-40F80L AA
Manufacturer:
Infineon Technologies
Quantity:
10 000
Company:
Part Number:
SAK-XC2265N-40F80L AA
Quantity:
882
duration of an asynchronous READY signal for safe synchronization is one CLKOUT
period plus the input setup time.
An active READY signal can be deactivated in response to the trailing (rising) edge of
the corresponding command (RD or WR).
If the next bus cycle is controlled by READY, an active READY signal must be disabled
before the first valid sample point in the next bus cycle. This sample point depends on
the programmed phases of the next cycle.
Figure 25
Data Sheet
CLKOUT
RD, WR
D15-D0
(read)
D15-D0
(write)
READY
Synchronous
READY
Asynchron.
READY Timing
tp
XC2261N, XC2263N, XC2264N, XC2265N, XC2268N
D
t
10
Not Rdy READY
t
30
t
31
tp
115
E
Data Out
Not Rdy
t
t
30
30
t
31
XC2000 Family / Value Line
tp
t
RDY
31
Data In
t
READY
30
t
30
Electrical Parameters
t
tp
20
MC_X_EBCREADY
t
31
F
t
31
V1.3, 2010-04
t
25

Related parts for SAK-XC2265N-40F80L