SAK-XC2365B-40F80L Infineon Technologies, SAK-XC2365B-40F80L Datasheet - Page 68

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SAK-XC2365B-40F80L

Manufacturer Part Number
SAK-XC2365B-40F80L
Description
IC MCU 16BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC23xxBr

Specifications of SAK-XC2365B-40F80L

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LSQFP
Processor Series
XC23xx
Core
C166S V2
Data Bus Width
32 bit
3rd Party Development Tools
PK166, CA166, AR166, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000486208

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAK-XC2365B-40F80L
Manufacturer:
Infineon Technologies
Quantity:
10 000
Part Number:
SAK-XC2365B-40F80L AA
Manufacturer:
Infineon Technologies
Quantity:
10 000
Company:
Part Number:
SAK-XC2365B-40F80LR AB
Quantity:
971
Part Number:
SAK-XC2365B-40F80LRAB
0
3.19
Table 11
The addressing modes that can be used with a specific instruction, the function of the
instructions, parameters for conditional execution of instructions, and the opcodes for
each instruction can be found in the “Instruction Set Manual”.
This document also provides a detailed description of each instruction.
Table 11
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR/BSET
BMOV(N)
BAND/BOR/BXOR AND/OR/XOR direct bit with direct bit
BCMP
BFLDH/BFLDL
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL/SHR
Data Sheet
lists the instructions of the XC236xB.
Instruction Set Summary
Instruction Set Summary
Description
Add word (byte) operands
Add word (byte) operands with Carry
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR
(16- × 16-bit)
(Un)Signed divide register MDL by direct GPR (16-/16-bit) 2
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit) 2
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bitwise AND, (word/byte operands)
Bitwise exclusive OR, (word/byte operands)
Clear/Set direct bit
Move (negated) direct bit to direct bit
Compare direct bit to direct bit
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
Compare word (byte) operands
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
word GPR and store result in direct word GPR
Bitwise OR, (word/byte operands)
Determine number of shift cycles to normalize direct
Shift left/right direct word GPR
XC2361B, XC2363B, XC2364B, XC2365B
68
XC2000 Family / Value Line
Functional Description
V1.2, 2010-04
Bytes
2 / 4
2 / 4
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2
2
2
2 / 4
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2
4
4
4
4
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2

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