SAF-C165-L25M HA Infineon Technologies, SAF-C165-L25M HA Datasheet - Page 20
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SAF-C165-L25M HA
Manufacturer Part Number
SAF-C165-L25M HA
Description
IC MCU 16BIT ROM/LESS MQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C165-LF_HA.pdf
(77 pages)
Specifications of SAF-C165-L25M HA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
77
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-SQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
1xASC, 1xSSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
77
Number Of Timers
5
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Packages
PG-MQFP-100
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
F165L25MHAXP
SAF-C165-L25MHA
SAF-C165-L25MHAINTR
SAF-C165-L25MHATR
SAF-C165-L25MHATR
SAFC165L25MHAXT
SP000011629
SP000011630
SAF-C165-L25MHA
SAF-C165-L25MHAINTR
SAF-C165-L25MHATR
SAF-C165-L25MHATR
SAFC165L25MHAXT
SP000011629
SP000011630
C165
The CPU has a register context consisting of up to 16 wordwide GPRs at its disposal.
These 16 GPRs are physically allocated within the on-chip RAM area. A Context Pointer
(CP) register determines the base address of the active register bank to be accessed by
the CPU at any time. The number of register banks is only restricted by the available
internal RAM space. For easy parameter passing, a register bank may overlap others.
A system stack of up to 1024 words is provided as a storage for temporary data. The
system stack is allocated in the on-chip RAM area, and it is accessed by the CPU via the
stack pointer (SP) register. Two separate SFRs, STKOV and STKUN, are implicitly
compared against the stack pointer value upon each stack access for the detection of a
stack overflow or underflow.
The high performance offered by the hardware implementation of the CPU can efficiently
be utilized by a programmer via the highly efficient C165 instruction set which includes
the following instruction classes:
– Arithmetic Instructions
– Logical Instructions
– Boolean Bit Manipulation Instructions
– Compare and Loop Control Instructions
– Shift and Rotate Instructions
– Prioritize Instruction
– Data Movement Instructions
– System Stack Instructions
– Jump and Call Instructions
– Return Instructions
– System Control Instructions
– Miscellaneous Instructions
The basic instruction length is either 2 or 4 bytes. Possible operand types are bits, bytes
and words. A variety of direct, indirect or immediate addressing modes are provided to
specify the required operands.
Data Sheet
16
V2.0, 2000-12