DS5003FPM-16+ Maxim Integrated Products, DS5003FPM-16+ Datasheet - Page 5

• Manufacturer Part Number: DS5003FPM-16+
• Description: IC MICROPROCESSOR SECURE 80-MQFP
• Manufacturer: Maxim Integrated Products
• Series: DS500xr

Specifications of DS5003FPM-16+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: SRAM
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-MQFP, 80-PQFP
• Processor Series: DS5003
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 32 KB, 64 KB, 128 KB
• Data Ram Size: 32 KB, 64 KB, 128 KB
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

AC CHARACTERISTICS—POWER-CYCLE TIME
(V
AC CHARACTERISTICS—SERIAL PORT TIMING (MODE 0)
(V
AC CHARACTERISTICS—BYTE-WIDE ADDRESS/DATA BUS TIMING
(V
Slew Rate from V
Crystal Startup Time
Power-On Reset Delay
Delay to Byte-Wide Address Valid from CE1, CE2,
or CE1N Low During Op Code Fetch
Pulse Width of CE1–CE4, PE1–PE4, or CE1N
Byte-Wide Address Hold After CE1, CE2, or CE1N
High During Op Code Fetch
Byte-Wide Data Setup to CE1, CE2, or CE1N High
During Op Code Fetch
Byte-Wide Data Hold After CE1, CE2, or CE1N High
During Op Code Fetch
Byte-Wide Address Hold After CE1–CE4, PE1–PE4,
or CE1N High During MOVX
Delay from Byte-Wide Address Valid CE1–CE4,
PE1–PE4, or CE1N Low During MOVX
Byte-Wide Data Setup to CE1–CE4, PE1–PE4, or
CE1N High During MOVX (Read)
Byte-Wide Data Hold After CE1–CE4, PE1–PE4, or
CE1N High During MOVX (Read)
Byte-Wide Address Valid to R/W Active During
MOVX (Write)
Serial Port Clock Cycle Time
Output Data Setup to Rising Clock Edge
Output Data Hold After Rising Clock Edge
Clock Rising Edge to Input Data Valid
Input Data Hold After Rising Clock Edge
CC
CC
CC
= 5V ±10%, T
= 5V ±10%, T
= 5V ±10%, T
CCMIN
A
A
A
PARAMETER
PARAMETER
PARAMETER
_______________________________________________________________________________________
= 0°C to +70°C.) (Figure 4)
= 0°C to +70°C.) (Figure 5)
= 0°C to +70°C.) (Figure 6)
to V
LI
Secure Microprocessor Chip
SYMBOL
SYMBOL
SYMBOL
t
t
t
t
t
t
t
CE1HPA
OVCE1H
CE1HOV
t
t
t
CE1LPA
t
t
t
CEHDA
DACEH
AVRWL
t
CELDA
CEHDV
t
SPCLK
t
t
DOCH
CHDIV
CEPW
CHDO
CHDV
CSU
POR
t
F
10t
2t
1t
1t
4t
2t
4t
4t
3t
CLK
CLK
CLK
12t
CLK
CLK
CLK
CLK
CLK
CLK
MIN
130
MIN
MIN
0
0
0
CLK
- 117
+ 40
+ 40
- 35
- 20
- 30
- 35
- 35
- 133
10t
(Note 12)
21,504
CLK
MAX
MAX
MAX
30
- 133
UNITS
UNITS
UNITS
t
CLK
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
5