SAK-TC1767-256F133HL AD Infineon Technologies, SAK-TC1767-256F133HL AD Datasheet - Page 44

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SAK-TC1767-256F133HL AD

Manufacturer Part Number
SAK-TC1767-256F133HL AD
Description
IC MCU 32BIT FLASH 176-LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1767-256F133HL AD

Core Processor
TriCore
Core Size
32-Bit
Speed
133MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
88
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 4x10b, 32x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Data Bus Width
32 bit
Data Ram Size
92 KB
Interface Type
SPI
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
88
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (12 bit, 16 Channel)
Packages
PG-LQFP-176
Max Clock Frequency
133.0 MHz
Sram (incl. Cache)
128.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
2.0 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000458056
Figure 10
Figure 10
The MLI transmitter and MLI receiver communicate with other MLI receivers and MLI
transmitters via a four-line serial connection each. Several I/O lines of these connections
are available outside the MLI module kernel as a four-line output or input vector with
index numbering A, B, C and D. The MLI module internal I/O control blocks define which
signal of a vector is actually taken into account and also allow polarity inversions (to
adapt to different physical interconnection means).
Data Sheet
f
TR[3:0]
BRKOUT
SR[7:0]
SYS
shows a general block diagram of the MLI module.
General Block Diagram of the MLI Modules
Divider
Engine
Fract.
Move
f
MLI
Transmitter
Receiver
MLI
MLI
MLI Module
40
Control
Control
I/O
I/O
TREADY[D:A]
TVALID[D:A]
TDATA
TCLK
RCLK[D:A]
RREADY[D:A]
RVALID[D:A]
RDATA[D:A]
4
4
4
4
4
4
MCB06062_mod
Introduction
Control
V1.3, 2009-09
Port
TC1767

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