PIC16C622/JW Microchip Technology, PIC16C622/JW Datasheet - Page 40
![IC MCU EPROM 2KX14 COMP 18CDIP](/photos/12/13/121351/150-18-cdip_sml.jpg)
PIC16C622/JW
Manufacturer Part Number
PIC16C622/JW
Description
IC MCU EPROM 2KX14 COMP 18CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C622/JW
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
EPROM, UV
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-CDIP (0.300", 7.62mm) Window
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
PIC16C622/JWR
PIC16C622/JWR
PIC16C622/JWR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIC16C62X
7.1
There are eight modes of operation for the
comparators. The CMCON register is used to select
the mode. Figure 7-1 shows the eight possible modes.
The TRISA register controls the data direction of the
comparator pins for each mode. If the Comparator
FIGURE 7-1:
DS30235J-page 38
A = Analog Input, Port Reads Zeros Always
D = Digital Input
CIS = CMCON<3>, Comparator Input Switch
RA3/AN3
RA1/AN1
RA2/AN2
RA3/AN3
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3
RA1/AN1
RA2/AN2
RA0/AN0
RA0/AN0
RA3/AN3
RA2/AN2
Comparators Reset
Two Independent Comparators
Two Common Reference Comparators
One Independent Comparator
RA0/AN0
RA1/AN1
Comparator Configuration
A
A
A
A
D
D
A
A
A
A
A
D
A
A
A
A
COMPARATOR I/O OPERATING MODES
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
C2
C2
C1
C2
C1
C1
C1
C2
CM<2:0> = 100
CM<2:0> = 011
CM<2:0> = 000
CM<2:0> = 101
C1OUT
C2OUT
C1OUT
C2OUT
(Read as '0')
(Read as '0')
(Read as '0')
C2OUT
Off
Off
Off
RA3/AN3
RA2/AN2
Four Inputs Multiplexed to
Two Comparators
Two Common Reference Comparators with Outputs
Three Inputs Multiplexed to
Two Comparators
RA0/AN0
RA1/AN1
Comparators Off
RA2/AN2
RA2/AN2
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown
in Table 12-2.
RA3/AN3
RA1/AN1
RA3/AN3
RA1/AN1
RA0/AN0
RA2/AN2
RA0/AN0
RA0/AN0
RA3/AN3
RA1/AN1
Note:
RA4 Open Drain
D
D
D
D
Comparator interrupts should be disabled
during a Comparator mode change other-
wise a false interrupt may occur.
A
A
A
A
A
A
A
A
A
D
A
A
V
V
V
V
CIS=0
CIS=1
CIS=0
CIS=1
CIS=0
CIS=1
IN
IN
IN
IN
V
V
V
V
V
V
V
V
-
+
-
+
IN
IN
IN
IN
IN
IN
IN
IN
-
+
-
+
-
+
-
+
-
+
-
+
2003 Microchip Technology Inc.
-
+
-
+
-
+
-
+
V
V
V
V
C1
C2
IN
IN
IN
IN
C2
C1
C2
-
+
C1
-
+
-
+
-
+
From V
C1
C2
CM<2:0> = 001
CM<2:0> = 010
CM<2:0> = 110
CM<2:0> = 111
(Read as '0')
(Read as '0')
REF
C2OUT
C1OUT
C2OUT
C1OUT
Module
Off
Off
C2OUT
C1OUT