PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 175
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 175 of 304
- Download datasheet (6Mb)
15.3
For standard mode I
resistors R
ing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices (input current +
The supply voltage limits the minimum value of resistor
R
at V
FIGURE 15-42:
p
leakage current)
2000 Microchip Technology Inc.
due to the specified minimum sink current of 3 mA
OL
Note: I
max = 0.4V for the specified output stages. For
Connection Considerations for
I
2
p
C Bus
also connected.
2
R
C devices with input levels related to V
s
in Figure 15-42 depends on the follow-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
R
p
R
DD
p
must have one common supply line to which the pull-up resistor is
R
s
V
DD
DEVICE
R
+ 10%
s
example, with a supply voltage of V
V
1.7 k
42. The desired noise margin of 0.1 V
level, limits the maximum value of R
are optional and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections and pins. This capacitance limits the max-
imum value of R
(Figure 15-42).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register and controls the slew rate of
the I/O pins when in I
OL
max = 0.4V at 3 mA, R
V
2
DD
C BUS
as a function of R
p
2
due to the specified rise time
C mode (master or slave).
PIC17C7XX
C
b
= 10 - 400 pF
p
p
min = (5.5-0.4)/0.003 =
is shown in Figure 15-
DD
DS30289B-page 175
s
. Series resistors
= 5V +10% and
DD
for the low
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