PIC18C252/JW Microchip Technology, PIC18C252/JW Datasheet - Page 150
![IC MCU 16x16 A/D 28CDIP](/photos/7/29/72984/150-28-cdip_sml.jpg)
PIC18C252/JW
Manufacturer Part Number
PIC18C252/JW
Description
IC MCU 16x16 A/D 28CDIP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C252/JW
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
EPROM, UV
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-CDIP (0.300", 7.62mm) Window
For Use With
XLT28XP - SOCKET TRANSITION ICE 28DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C252/JW
Manufacturer:
MICROCHIP
Quantity:
4 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 150 of 305
- Download datasheet (6Mb)
PIC18CXX2
14.4.16.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 14-29:
FIGURE 14-30:
DS39026C-page 148
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
SDA
PEN
SCL
Bus Collision During a STOP
Condition
P
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
Assert SDA
T
SDA asserted low
BRG
T
BRG
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ’0’ (Figure 14-29). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master attempt-
ing to drive a data ’0’ (Figure 14-30).
SCL goes low before SDA goes high
Set BCLIF
T
BRG
T
BRG
2001 Microchip Technology Inc.
’0’
’0’
SDA sampled
low after T
Set BCLIF
’0’
’0’
BRG
,
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