AT91M63200-25AI Atmel, AT91M63200-25AI Datasheet - Page 9
![IC ARM7 MCU 176 TQFP](/photos/12/32/123243/313-176-lqfp_sml.jpg)
AT91M63200-25AI
Manufacturer Part Number
AT91M63200-25AI
Description
IC ARM7 MCU 176 TQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91M43300-25CI.pdf
(21 pages)
2.AT91M43300-25CI.pdf
(5 pages)
3.AT91M63200-25AI.pdf
(12 pages)
4.AT91M63200-25AI.pdf
(153 pages)
Specifications of AT91M63200-25AI
Core Processor
ARM7
Core Size
16/32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-TQFP, 176-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Peripheral Signals Relative to MCKI
USART Signals
Table 10. USART Outputs
The inputs can be used synchronously or asynchronously (in relation to MCKI).
For synchronous and asynchronous USART inputs, certain setup/hold constraints must be met. These constraints are
shown in Tables 11 and 12 and are represented in Figure 4.
For asynchronous inputs, a minimum pulse-width is necessary as shown in Table 13 and as represented in Figure 4.
Table 11. USART Synchronous Input Setup/Hold Constraints
Table 12. USART Asynchronous Input Setup/Hold Constraints
Table 13. USART Asynchronous Input Minimum Pulse-width
Symbol
US
US
US
US
Symbol
US
US
US
Symbol
US
Symbol
US
1
2
3
4
5
6
7
8
9
Parameter
MCKI Rising to SCK Output
Rising/Falling
MCKI Rising to TXD Toggling
SCK Output Falling to TXD Toggling
SCK Input Falling to TXD Toggling
Type of Input
Synchronous
Synchronous
Synchronous
Type of Input
Asynchronous
Type of Input
Asynchronous
Parameter
RXD Toggling Relative to MCKI Falling
SCK Input Rising Relative to MCKI Rising
SCK Input Falling Relative to MCKI Rising
Parameter
RXD Toggling Relative to SCK Input Rising
Parameter
RXD/SCK Minimum Pulse-width
Core at 2V
TBD
TBD
TBD
TBD
Minimum
Core at 3.3V
TBD
TBD
TBD
TBD
Core at 2V
TBD
TBD
TBD
TBD
t
Setup
Setup
CP/2
0
0
0
Maximum
- 2
Pulse-width
3(t
CP
Core at 3.3V
2(t
/2)
CP
t
25
35
10
CP/2
) + 35
Hold
Hold
5
5
5
+ 2
Units
Units
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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