PIC16C662-04/P Microchip Technology, PIC16C662-04/P Datasheet - Page 32

• Manufacturer Part Number: PIC16C662-04/P
• Description: IC MCU OTP 4KX14 COMP 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C662-04/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Data Rom Size: 176 B
• Height: 3.81 mm
• Length: 52.26 mm
• Supply Voltage (max): 6 V
• Supply Voltage (min): 4 V
• Width: 13.84 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C64X & PIC16C66X
5.2
PORTB is an 8-bit wide bi-directional port. The
corresponding data direction register is TRISB. Setting
a bit in the TRISB register puts the corresponding out-
put driver in a hi-impedance mode. Clearing a bit in the
TRISB register puts the contents of the output latch on
the selected pin(s).
Reading PORTB register reads the status of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. There-
fore, a write to a port implies that the port pins are read,
this value is modified, and then written to the port data
latch.
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
done by clearing the RBPU (OPTION<7>) bit. The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e., any RB7:RB4 pin
configured as an output is excluded from the interrupt
on change comparison). The input pins (of RB7:RB4)
are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4
are OR’ed together to generate the RBIF interrupt (flag
latched in (INTCON<0>)).
FIGURE 5-5:
DS30559A-page 32
Set RBIF
RB7:RB6 in serial programming mode
Data bus
Note 1: I/O pins have diode protection to V
WR TRIS
WR Port
RBPU
2: TRISB = '1' enables weak pull-up if RBPU = '0'
(2)
PORTB and TRISB Registers
From other
RB7:RB4 pins
(OPTION<7>).
BLOCK DIAGRAM OF
RB7:RB4 PINS
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
CK
CK
Q
Q
Q
Q
Latch
DD
EN
EN
D
D
and V
TTL
Input
Buffer
SS
V
RD Port
P
DD
.
ST
Buffer
weak
pull-up
I/O
pin
(1)
Preliminary
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the
interrupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
This interrupt on mismatch feature, together with
software configurable pull-ups on these four pins allow
easy interface to a keypad and make it possible for
wake-up on key-depression. (See AN552 in the
Microchip Embedded Control Handbook .)
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 5-6:
Data bus
WR TRIS
WR Port
RBPU
RB0/INT
Note 1: I/O pins have diode protection to V
Any read or write of PORTB. This will end the
mismatch condition.
Clear flag bit RBIF.
(2)
2: TRISB = '1' enables weak pull-up if RBPU = '0'
(OPTION<7>).
BLOCK DIAGRAM OF
RB3:RB0 PINS
RD TRIS
RD Port
Data Latch
D
D
CK
CK
ST
Buffer
Q
Q
1996 Microchip Technology Inc.
Q
DD
EN
and V
TTL
Input
Buffer
D
SS
V
.
P
RD Port
DD
weak
pull-up
I/O
pin
(1)