PIC16F84AT-04/SS Microchip Technology, PIC16F84AT-04/SS Datasheet - Page 171
![IC MCU FLASH 1KX14 EE 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F84AT-04/SS
Manufacturer Part Number
PIC16F84AT-04/SS
Description
IC MCU FLASH 1KX14 EE 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84AT-04/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPI3-DB16F84A - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
- Current page: 171 of 688
- Download datasheet (3Mb)
11.2
1997 Microchip Technology Inc.
Control Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2:0
The OPTION_REG register is a readable and writable register which contains various control bits
to configure the TMR0/WDT prescaler, the External INT Interrupt, TMR0, and the weak pull-ups
on PORTB.
Register 11-1: OPTION_REG Register
bit 7
RBPU
1 = Weak pull-ups are disabled
0 = Weak pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Bit Value
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
RBPU
R/W-1
Note:
Note 1: Some devices call this bit GPPU. Devices that have the RBPU bit, have the weak
000
001
010
011
100
101
110
111
(1)
(1)
: Weak Pull-up Enable bit
To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler
to the Watchdog Timer.
TMR0 Rate
pull-ups on PORTB, while devices that have the GPPU have the weak pull-ups on
the GPIO Port.
INTEDG
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
WDT Rate
W = Writable bit
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
R/W-1
T0CS
R/W-1
T0SE
Section 11. Timer0
- n = Value at POR reset
R/W-1
PSA
R/W-1
PS2
R/W-1
PS1
DS31011A-page 11-3
bit 0
R/W-1
PS0
11
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