PIC17C43-25E/PQ Microchip Technology, PIC17C43-25E/PQ Datasheet - Page 60
PIC17C43-25E/PQ
Manufacturer Part Number
PIC17C43-25E/PQ
Description
IC MCU OTP 4KX16 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C43-16P.pdf
(4 pages)
Specifications of PIC17C43-25E/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (4K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
For Use With
AC164316 - MODULE SKT MPLAB PM3 44MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C43-25E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
9.4
PORTD is an 8-bit bi-directional port. The correspond-
ing data direction register is DDRD. A '1' in DDRD con-
figures the corresponding port pin as an input. A '0' in
the DDRC register configures the corresponding port
pin as an output. Reading PORTD reads the status of
the pins, whereas writing to it will write to the port latch.
PORTD is multiplexed with the system bus. When
operating as the system bus, PORTD is the high order
byte of the address/data bus (AD15:AD8). The timing
for the system bus is shown in the Electrical Character-
istics section.
FIGURE 9-7:
DS30412C-page 60
Note: I/O pins have protection diodes to V
Note:
PORTD and DDRD Registers
This port is configured as the system bus
when the device’s configuration bits are
selected to Microprocessor or Extended
Microcontroller modes. In the two other
microcontroller modes, this port is a gen-
eral purpose I/O.
PORTD BLOCK DIAGRAM (IN I/O PORT MODE)
TTL
Input
Buffer
DD
0
1
and Vss.
Data
Port
Q
Q
R
CK
CK
S
D
D
Example 9-3 shows the instruction sequence to initial-
ize PORTD. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized.
EXAMPLE 9-3:
MOVLB 1
CLRF
MOVLW 0xCF
MOVWF DDRD
PORTD
INSTRUCTION READ
INITIALIZING PORTD
;
;
;
;
;
;
;
;
;
;
to D_Bus
DATA/ADDR_OUT
1996 Microchip Technology Inc.
Select Bank 1
Initialize PORTD data
Value used to initialize
Set RD<3:0> as inputs
data direction
latches before setting
the data direction
register
RD<5:4> as outputs
RD<7:6> as inputs
WR_PORTD
RD_PORTD
WR_DDRD
RD_DDRD
DRV_SYS
Data Bus
EX_EN
IR
SYS BUS
Control
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