PIC17LC752T-08/L Microchip Technology, PIC17LC752T-08/L Datasheet - Page 35
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PIC17LC752T-08/L
Manufacturer Part Number
PIC17LC752T-08/L
Description
IC MCU OTP 8KX16 A/D 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Specifications of PIC17LC752T-08/L
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
678 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
PIC17LC752T-08/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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6.2
These registers contains the individual enable bits for
the peripheral interrupts.
REGISTER 6-2: PIE1 REGISTER (ADDRESS: 17h, BANK 1)
2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Peripheral Interrupt Enable
Register1 (PIE1) and Register2
(PIE2)
Legend:
R = Readable bit
- n = Value at POR Reset
bit 7
RBIE: PORTB Interrupt-on-Change Enable bit
1 = Enable PORTB interrupt-on-change
0 = Disable PORTB interrupt-on-change
TMR3IE: TMR3 Interrupt Enable bit
1 = Enable TMR3 interrupt
0 = Disable TMR3 interrupt
TMR2IE: TMR2 Interrupt Enable bit
1 = Enable TMR2 interrupt
0 = Disable TMR2 interrupt
TMR1IE: TMR1 Interrupt Enable bit
1 = Enable TMR1 interrupt
0 = Disable TMR1 interrupt
CA2IE: Capture2 Interrupt Enable bit
1 = Enable Capture2 interrupt
0 = Disable Capture2 interrupt
CA1IE: Capture1 Interrupt Enable bit
1 = Enable Capture1 interrupt
0 = Disable Capture1 interrupt
TX1IE: USART1 Transmit Interrupt Enable bit
1 = Enable USART1 Transmit buffer empty interrupt
0 = Disable USART1 Transmit buffer empty interrupt
RC1IE: USART1 Receive Interrupt Enable bit
1 = Enable USART1 Receive buffer full interrupt
0 = Disable USART1 Receive buffer full interrupt
R/W-0
RBIE
TMR3IE
R/W-0
TMR2IE
R/W-0
W = Writable bit
’1’ = Bit is set
TMR1IE
R/W-0
R/W-0
CA2IE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CA1IE
R/W-0
PIC17C7XX
x = Bit is unknown
R/W-0
TX1IE
DS30289B-page 35
RC1IE
R/W-0
bit 0
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