PIC17LC756AT-08/L Microchip Technology, PIC17LC756AT-08/L Datasheet - Page 112

• Manufacturer Part Number: PIC17LC756AT-08/L
• Description: IC MCU OTP 16KX16 A/D 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17LC756AT-08/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC17LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 12 bit
• Data Rom Size: 902 B
• Height: 4.06 mm
• Length: 24.33 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Width: 24.33 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC17C7XX
13.2.2
This mode is selected by setting bit CA1/PR3. A block
diagram is shown in Figure 13-6. In this mode, TMR3
runs without a period register and increments from
0000h to FFFFh and rolls over to 0000h. The TMR3
interrupt Flag (TMR3IF) is set on this rollover. The
TMR3IF bit must be cleared in software.
FIGURE 13-6:
DS30289B-page 112
RB5/TCLK3
RB0/CAP1
RB1/CAP2
RG4/CAP3
RE3/CAP4
FOUR CAPTURE MODE
F
OSC
/4
TMR3CS
(TCON1<2>)
Edge Select,
Prescaler Select
Edge Select,
Prescaler Select
Edge Select,
Prescaler Select
Edge Select,
Prescaler Select
TIMER3 WITH FOUR CAPTURES BLOCK DIAGRAM
2
2
2
2
0
1
CA3ED1: CA3ED0
(TCON3<2:1>)
CA4ED1: CA4ED0
(TCON3<4:3>)
CA2ED1, CA2ED0
(TCON1<7:6>)
CA1ED1, CA1ED0
(TCON1<5:4>)
TMR3ON
(TCON2<2>)
Capture1 Enable
Capture3 Enable
Capture4 Enable
Capture2 Enable
Set CA3IF
Set CA4IF
Set CA1IF
Set CA2IF
(PIR1<2>)
(PIR1<3>)
(PIR2<2>)
(PIR2<3>)
PR3H/CA1H
CA2H
CA3H
CA4H
Registers PR3H/CA1H and PR3L/CA1L make a 16-bit
capture register (Capture1). It captures events on pin
RB0/CAP1. Capture mode is configured by the
CA1ED1 and CA1ED0 bits. Capture1 Interrupt Flag bit
(CA1IF) is set upon detection of the capture event. The
corresponding interrupt mask bit is CA1IE. The
Capture1 Overflow Status bit is CA1OVF.
All the captures operate in the same manner. Refer to
Section 13.2.1 for the operation of capture.
PR3L/CA1L
CA2L
CA3L
CA4L
TMR3H
2000 Microchip Technology Inc.
TMR3L
Set TMR3IF
(PIR1<6>)