AT90LS4433-4PI Atmel, AT90LS4433-4PI Datasheet - Page 5
AT90LS4433-4PI
Manufacturer Part Number
AT90LS4433-4PI
Description
IC MCU 4K FLSH 4MHZ A/D LV 28DIP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet
1.AT90S4433-8AC.pdf
(126 pages)
Specifications of AT90LS4433-4PI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Pin Descriptions
VCC
GND
Port B (PB5..PB0)
Port C (PC5..PC0)
Port D (PD7..PD0)
RESET
XTAL1
XTAL2
AVCC
AREF
AGND
1042H–AVR–04/03
Supply voltage.
Ground.
Port B is a 6-bit bi-directional I/O port with internal pull-up resistors. The Port B output
buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated.
Port B also serves the functions of various special features of the AT90S4433 as listed
on page 73.
The Port B pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Port C is a 6-bit bi-directional I/O port with internal pull-up resistors. The Port C output
buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source
current if the pull-up resistors are activated. Port C also serves as the analog inputs to
the A/D Converter.
The Port C pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output
buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated.
Port D also serves the functions of various special features of the AT90S4433 as listed
on page 81.
The Port D pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Reset input. An External Reset is generated by a low level on the RESET pin. Reset
pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit
Output from the inverting oscillator amplifier
AVCC is the supply voltage for Port A and the A/D Converter. If the ADC is not used,
this pin must be connected to V
V
AREF is the analog reference input for the A/D Converter. For ADC operations, a volt-
age in the range 2.0V to AVCC must be applied to this pin.
If the board has a separate analog ground plane, this pin should be connected to this
ground plane. Otherwise, connect to GND.
CC
via a low-pass filter. See page 64 for details on operation of the ADC.
CC
. If the ADC is used, this pin should be connected to
AT90S/LS4433
5
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