AT87F55WD-24AI Atmel, AT87F55WD-24AI Datasheet

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... The on-chip QuickFlash allows the program memory to be user programmed by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with QuickFlash on a monolithic chip, the Atmel AT87F55WD is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. ...

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... Block Diagram V CC GND RAM ADDR. REGISTER B REGISTER PSEN TIMING ALE/PROG INSTRUCTION AND REGISTER CONTROL RST OSC AT87F55WD 2 P0.0 - P0.7 PORT 0 DRIVERS PORT 0 RAM LATCH ACC TMP2 TMP1 ALU INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PSW PORT 1 LATCH WATCH DOG PORT 1 DRIVERS P1 ...

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... Port 3 pins that are externally being pulled low will source current (I ) because of the pullups. IL Port 3 also serves the functions of various special features of the AT87F55WD, as shown in the following table. Port 3 also receives some control signals for QuickFlash programming and verification. Port Pin Alternate Functions P3 ...

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... Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external pro- gram memory. When the AT87F55WD is executing code from external program memory, PSEN is activated twice each machine Table 1. AT87F55WD SFR Map and Reset Values 0F8H B ...

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Special Function Registers A map of the on-chip memory area called the Special Func- tion Register (SFR) space is shown in Table 1. Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented ...

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... Bit 7 – Reserved for future expansion DPS Data Pointer Register Select DPS 0 Selects DPTR Registers DP0L, DP0H 1 Selects DPTR Registers DP1L, DP1H AT87F55WD 6 – – WDIDLE DISRTO Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power up ...

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... Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT87F55WD connected to V fetches to addresses 0000H through 4FFFH are directed to internal memory and fetches to addresses 5000H through FFFFH are directed to external memory. ...

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... December 1997 Microcontroller Data Book, page 2-48, section titled, “Serial Interface”. Timer 0 and 1 Timer 0 and Timer 1 in the AT87F55WD operate the same way as Timer 0 and Timer 1 in the AT87F51 and AT87F52. Timer 2 Timer 16-bit Timer/Counter that can operate as either a timer or an event counter ...

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Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transi- tion, the maximum count rate is 1/24 of the oscillator fre- quency. To ensure that a given level is sampled at least ...

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... Not Bit Addressable – – Bit 7 6 Symbol Function – Not implemented, reserved for future T2OE Timer 2 Output Enable bit. DCEN When set, this bit allows Timer configured as an up/down counter. AT87F55WD 10 C/ CONTR OL TR2 C/ RELO AD RCAP2H CONTROL EXEN2 – – – 5 ...

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Figure 7. Timer 2 Auto Reload Mode (DCEN = 1) OSC PIN Figure 8. Timer 2 in Baud Rate Generator Mode NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12 ÷ 2 ...

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... Figure 9. Timer 2 in Clock-Out Mode OSC P1.0 (T2) TRANSITION DETECTOR P1.1 (T2EX) AT87F55WD 12 increments every state time (at 1/2 the oscillator fre- quency). The baud rate formula is given below. Modes 1 and 3 -------------------------------------- - Baud Rate where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer. ...

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... Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that Table 5 shows that bit position IE.6 is unimple- mented. In the AT87F55WD, bit position IE.5 is also unim- plemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. ...

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... Program Memory Idle Internal Idle External Power-down Internal Power-down External AT87F55WD 14 its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Figure 11. Oscillator Connections C1 ± for Crystals Note: Figure 12. External Clock Drive Configuration EXTERNAL OSCILLATOR ...

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... Program Memory Lock Bits The AT87F55WD has three lock bits that can be left unpro- grammed (U) or can be programmed (P) to obtain the addi- tional features listed in the following table. Table 8. Lock Bit Protection Modes Program Lock Bits LB1 LB2 LB3 Protection Type ...

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... PSEN P3.4 P0.7-0 P3.6 P3.7 Data A14 A14 OUT D2 1EH 87H 05H X AT87F55WD ADDR. P1.0-P1 A13 P0 P2.0 - P2.5 A14* P3.4 P2.6 P2.7 ALE P3.3 P3.6 P3.7 XTAL 2 EA XTAL1 RST GND PSEN P2.5-0 P1.7-0 Address A13-8 A7-0 A13-8 A7 000H X 100H X 200H ...

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QuickFlash Programming and Verification Characteristics T = 20°C to 30° 4. Symbol Parameter V Programming Supply Voltage PP I Programming Supply Current Supply Current CC CC 1/t Oscillator Frequency CLCL t ...

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... QuickFlash Programming and Verification Waveforms P1.0 - P1.7 P2.0 - P2.5 P3.4 PORT 0 ALE/PROG EA/V PP P2.7 (ENABLE) P3.0 (RDY/BSY) AT87F55WD 18 PROGRAMMING ADDRESS DATA DVGL GHDX t t AVGL GHAX t t SHGL GHSL t GLGH EHSH t ELQV t GHBL VERIFICATION ADDRESS t AVQV DATA OUT LOGIC 1 LOGIC 0 t EHQZ ...

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Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage ............................................ 6.6V DC Output Current...................................................... 15 Characteristics The values shown ...

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... Address Low AVWL t Data Valid to WR Transition QVWX t Data Valid to WR High QVWH t Data Hold After WR WHQX t RD Low to Address Float RLAZ High to ALE High WHLH AT87F55WD 20 12 MHz Oscillator Variable Oscillator Min Max Min 0 127 2t -40 CLCL 43 t -25 CLCL 48 t -25 ...

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External Program Memory Read Cycle ALE PSEN PORT 0 PORT 2 External Data Memory Read Cycle ALE PSEN RD PORT 0 PORT 2 t LHLL t AVLL t LLPL t PLAZ t LLAX AVIV A8 - ...

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... External Clock Drive Symbol Parameter 1/t Oscillator Frequency CLCL t Clock Period CLCL t High Time CHCX t Low Time CLCX t Rise Time CLCH t Fall Time CHCL AT87F55WD 22 t LHLL t t LLWL WLWH t LLAX t t QVWX AVLL t QVWH DATA OUT t AVWL P2 A15 FROM DPH t ...

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Serial Port Timing: Shift Register Mode Test Conditions The values in this table are valid for V Symbol Parameter t Serial Port Clock Cycle Time XLXL t Output Data Setup to Clock Rising Edge QVXH t Output Data Hold After ...

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... Ordering Information Speed Power (MHz) Supply Ordering Code 24 4.0V to 5.5V AT87F55WD-24AC AT87F55WD-24JC AT87F55WD-24PC AT87F55WD-24AI AT87F55WD-24JI AT87F55WD-24PI 33 4.5V to 5.5V AT87F55WD-33AC AT87F55WD-33JC AT87F55WD-33PC = Preliminary Availability 44A 44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP) 44J 44-lead, Plastic J-leaded Chip Carrier (PLCC) 40P6 40-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) ...

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... MAX SEATING PLANE .161(4.09) .125(3.18) .065(1.65) .110(2.79) .041(1.04) .090(2.29) .630(16.0) .590(15.0) .012(.305) .008(.203) .690(17.5) .610(15.5) AT87F55WD 25 44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) 12.21(0.478) SQ 11.75(0.458) 0.45(0.018) 0.30(0.012) .032(.813) .026(.660) .050(1.27) TYP 10.10(0.394) SQ 9.90(0.386) 1 ...

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... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...